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MIT6_012F09_lec22

# MIT6_012F09_lec22 - 6.012 Microelectronic Devices and...

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6.012 - Microelectronic Devices and Circuits Lecture 22 - Diff-Amp Anal. III: Cascode, µ A-741 - Outline Announcements DP : Discussion of Q13, Q13' impact. Gain expressions. Review - Output Stages DC Offset of an OpAmp Push-pull/totem pole output stages Specialty Stages, cont. - more useful transistor pairings The Marvelous Cascode Darlington Connection A Commercial Op-Amp Example - the µ A-741 The schematic and chip layout Understanding the circuit Bounding mid-band - starting high frequency issues Review of Mid-band concept The Method of Open-Circuit Time Constants Clif Fonstad, 12/1/09 Lecture 22 - Slide 1

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DC off-set at the output of an Operational Amplifier: DC off-set: The node between Q 12 and Q 13 is a high impedance node whose quiescent voltage can only be determined by invoking symmetry.* Q 16 Q 19 Q 18 Q 20 Q 21 v OUT + - B + 1.5 V - 1.5 V A Q 17 Q 15 Q 11 Q 12 Q 13 Q 14 Q 13 ' The voltage on these two nodes is equal if there is no input, i.e. v IN1 = v IN2 = 0, and if the circuit is truly symmetrical/matched. This is the high impedance node. Real-world asymmetries mean the voltage on this node is unpredictable. 0 V 0.6 V + - 0.6 V + - 0 V + + - - 0.5 V 0.6 V - 0.4 V - 0.4 V The voltage symmetry says will be at this node. The voltage we need at this node to make V OUT = 0. 0.6 V + - 0.6 V + - In any practical Op Amp, a very small differential input, v IN1 -v IN2 , is require to make the voltage on this node (and V OUT ) zero. Clif Fonstad, 12/1/09 Lecture 22 - Slide 2
DC off-set at the output of an Op Amp, cont: DC off-set: The transfer characteristic, v OUT vs (v IN1 - v IN2 ) , will not in general go through the origin, i.e., v OUT = A vd (v IN1 - v IN2 ) + V OFFSET In the example in the figure A vd is -2 x 10 6 , and V OFFSET is 0.1 V. V IN2 - V IN1 V OUT 1V 0.5 μ V -A vd = 2x10 6 V IN2 - V IN1 0.1V -50nV V OUT + - 50 ! R + - R v OUT v IN + - A vd Input 1 Input 2 In a practice, an Op Amp will be used in a feed-back circuit like the example shown to the left, and the value of v OUT with v IN = 0 will be quite small. For this example (in which A vd = -2 x 10 6 , and V OFFSET = In the D.P. you are asked for this value for your design. is only 0.1 0.1 V) v OUT µ V. Clif Fonstad, 12/1/09 Lecture 22 - Slide 3

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Specialty pairings: Push-pull or Totem Pole Output Pairs A source follower output: - Using a single source follower as the output stage must be biased with a relatively large drain current to achieve a large output voltage swing, which in turn dissipates a lot of quiescent power. Q 28 + 1.5 V - 1.5 V I BIAS v IN + - v OUT + - v IN goes positive v OUT goes positive Load current is supplied through Q 28 as it turns on more strongly R L Q + 1.5 V - 1.5 V I BIAS v IN + - v OUT + - v IN goes negative Negative v OUT swing limited to -I BIAS R L As Q turns off I BIAS flows through load. R L Turns off The Problem Clif Fonstad, 12/1/09 Lecture 22 - Slide 4
Specialty Pairings: The Push-pull or Totem Pole Output A stacked pair of complementary emitter- or source-followers Large input resistance Voltage gain near one Small output resistance Low quiescent power npn or n-MOS follower pnp or p-MOS follower Q n Q p V+ V- v out + - R L v in +V BEn + - + - v in -V EBp Q n Q p V- V+ v out + - R L v in +V GSn + - + - v in -V SGp Clif Fonstad, 12/1/09 Lecture 22 - Slide 5

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MIT6_012F09_lec22 - 6.012 Microelectronic Devices and...

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