MIT6_012F09_lec23

MIT6_012F09_lec23 - 6.012 - Microelectronic Devices and...

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Unformatted text preview: 6.012 - Microelectronic Devices and Circuits Lecture 23 - Circuits at High Frequencies - Outline • Announcements Design Problem - Due tomorrow, Dec. 4, by 5 p.m. Postings on Stellar - Cascode; µA-741 • Bounding mid-band - finding ωHI, ωLO Method of open circuit time constants: finding ωHI (How high can we fly?) Method of short circuit time constants: finding ωLO (How low can we go?) The lesson of the OCTC and SCTC methods: which capacitors matter • The Miller effect: why Cµ and Cgd are so important The concept: the consequences of having a capacitor shunting a gain stage Examples: common-emitter/-source stages common-base/gate stages; emitter-/source-followers the µA 741 - stabilizing a high gain circuit • The Marvelous cascode: impact on ωHI Concept and ωHI: getting larger bandwidth from CE + CB The costs Clif Fonstad, 12/3/09 Lecture 23 - Slide 1 The impact of Q13' and Q13 on the voltage gains We added transistor Q13 to the left side of the DP second gain stage (the Current Mirror), and said it has no effect on the Avd or Avc of this stage. In fact it does have some impact on the commonmode voltage gain. The following few sides look at this impact. + 1.5 V Q12 Q11 A Q16 Q13' Q13 Q17 We find that now: # gm11 & Avc " %1 + (= $ gm13' ' " 1.5 # 2 Vthermal & %1 + ( VGS11 ) VT 11 ' $ Q14 Q15 - 1.5 V Remember that it is possible to make the bias currents in the two legs of the mirror (Q11/Q14 and Q12/Q15) different by making the transistors widths different. Clif Fonstad, 12/3/09 Lecture 23 - Slide 2 The impact of Q13' and Q13 on the voltage gains, cont. V+ In the design problem we have a current mirror stage with a level shift diode in each leg. The bias currents of the two legs can also be different. We can do an LEC analysis of this circuit in the same way we did without the two diodes. We start with the LEC for the left side and find vinner: Q1 D1' Q3 + vIC + vID /2 - + v ic +v id /2 = v gs3 - Q2 D1 + + Q4 + vIC - vID /2 - vINNER - vOUT - Vgd1’ gm3v gs3 go3 go1 gm1 + v inner - LEC for the left side Clif Fonstad, 12/3/09 Lecture 23 - Slide 3 The impact of Q13' and Q13 on the voltage gains, cont. The left side LEC gives: v inner % v( " # (1 # $ )' v ic + id * & 2) with rd 1' + 2 rm 3 2 go 3 % gm 3 ( $+ = '1 + * ro 3 gm 3 & 2 gd 1' ) Next we analyze the right side LEC: ! + v ic -v id /2 = v gs4 - go4 gel gm4v gs4 + gd1 v out - go2 gm2v inner LEC for the right side To see the impact of gd1 on this side, apply one source at a time and superimpose the results: + v ic -v id /2 = v gs4 - gm4vgs4 alone: gm4v gs4 go4 gel + gd1 v out1 - go2 go4 gel + gd1 v out2 - go2 gm2vinner alone: + v ic -v id /2 = v gs4 Clif Fonstad, 12/3/09 gm2v inner Lecture 23 - Slide 4 The impact of Q13' and Q13 on the voltage gains, cont. Writing ro4||rel as ro4*, and doing this we find: v out = v out1 + v out 2 = = ! (r " o4 + ro 2 + rd ) gm 4 v gs4 ro 2 ro"4 #" (1 # $ ) gm 2v gs2 (ro4 + ro2 + rd ) (ro 2 + rd ) ro"4 % % v id ( ro 2 ro"4 v( gm 4 'v ic # * # " (1 # $ ) gm 2 'v ic + id * & 2) 2) (ro"4 + ro2 + rd ) & (ro4 + ro2 + rd ) Next look at the terms involving vid and vic terms separately: vid: # % ( # ( ro2 + rd ) ro4 "' # gm 4 '( ro 4 + ro 2 + rel ) & vic: ! (ro 2 + rd ) ro"4 Note: Analysis sets gm1 = gm3, gm2 = gm4, go1 = go3, go2 = go4. ro 2 ro#4 (2 " $ ) ro 2 ro 4 v id v +# 1 " $ ) gm 2 * +# gm 4 id ( 2 ro 4 + ro 2 + rd ) * 2 ( ro 4 + ro 2 + rd ) ( ) % ( r + r ) r# ( ro 2 ro#4 ( rd + $ ro2 ) ro#4 g v " ' #o 2 d o 4 gm 4 " # (1 " $ ) gm 2 * v ic = # '( ro 4 + ro 2 + rd ) * (ro4 + ro2 + rd ) (ro4 + ro2 + rd ) m 4 ic & ) Ultimately we find: v out ! 2 gm 4 (v in1 # v in 2 ) # $1 + gm1 ' (v in1 + v in 2 ) " & ) 2 2 (2 go4 + gel ) % gd 1' ( ≈ unchanged by adding diodes Clif Fonstad, 12/3/09 ! ≈ 1.5, increased from ≈1 by adding diodes Lecture 23 - Slide 5 Mid-band, cont: The mid-band range of frequencies In this range of frequencies the gain is a constant, and the phase shift between the input and output is also constant (either 0˚ or 180˚). log |A vd | Mid-band Range !LO !b !a !d !c !LO * !HI * !HI !4 log ! ! !5 !2 1 !3 All of the parasitic and intrinsic device capacitances are effectively open circuits All of the biasing and coupling capacitors are effectively short circuits Clif Fonstad, 12/3/09 Lecture 23 - Slide 6 Bounding mid-band: frequency range of constant gain and phase Cgd g Common Source ++ v gs v rt V+ + vt in - Cgs gmv gs go gsl s,b - CO + v out gel CS gob - LEC for common source stage with all the capacitors vout - + vin - CO + d Biasing capacitors: (CO, CS, etc.) IBIAS Device capacitors: CE (Cgs, Cgd, etc.) typically in mF range effectively shorts above ωLO typically in pF range effectively open until ωHI Mid-band frequencies fall between: ωLO < ω < ωHI V- g + vt - rt + v in = v gs s,b d + gmv gs go v out - gl s,b Common emitter LEC for in mid-band range Note: gl = gsl + gel Clif Fonstad, 12/3/09 What are ωLO and ωHI? Lecture 23 - Slide 7 Estimating ωHI - Open Circuit Time Constants Method Open circuit time constants (OCTC) recipe: 1. Pick one Cgd, Cgs, Cµ, Cπ, etc. (call it C1) and assume all others are open circuits. 2. Find the resistance in parallel with C1 and call it R1. 3. Calculate 1/R1C1 and call it ω1. 4. Repeat this for each of the N different Cgd's, Cgs's, Cµ's, Cπ's, etc., in the circuit finding ω1, ω2, ω3, …, ωN. 5. Define ωHI* as the inverse of the sum of the inverses of the N ωi's: ωHI* = [Σ(ωi)-1]-1 = [ΣRiCi]-1 6. The true ωHI is similar to, but greater than, ωHI*. Observations: The OCTC method gives a conservative, low estimate for ωHI. The sum of inverses favors the smallest ωi, and thus the capacitor with the largest RC product dominates ωHI*. Clif Fonstad, 12/3/09 Lecture 23 - Slide 8 Estimating ωLO - Short Circuit Time Constants Method Short circuit time constants (SCTC) recipe: 1. Pick one CO, CI, CE, etc. (call it C1) and assume all others are short circuits. 2. Find the resistance in parallel with C1 and call it R1. 3. Calculate 1/R1C1 and call it ω1. 4. Repeat this for each of the M different CI's, CO's, CE's, CS's, etc., in the circuit finding ω1, ω2, ω3, …, ωM. 5. Define ωLO* as the sum of the M ωj's: ωLO* = [Σ(ωj)] = [Σ(RjCj)-1] 6. The true ωLO is similar to, but less than, ωLO*. Observations: The SCTC method gives a conservative, high estimate for ωLO. The sum of inverses favors the largest ωj, and thus the capacitor with the smallest RC product dominates ωLO*. Clif Fonstad, 12/3/09 Lecture 23 - Slide 9 Summary of OCTC and SCTC results log |A vd | Mid-band Range !LO !b !a !d !c !LO * !HI * !HI !4 log ! ! !5 !2 1 !3 • OCTC: 1. 2. 3. an estimate for ωHI ωHI* is a weighted sum of ω's associated with device capacitances: (add RC's and invert) Smallest ω (largest RC) dominates ωHI* Provides a lower bound on ωHI • SCTC: 1. 2. 3. an estimate for ωLO ωLO* is a weighted sum of w's associated with bias capacitors: (add ω's directly) Largest ω (smallest RC) dominates ωLO* Provides a upper bound on ωLO Clif Fonstad, 12/3/09 Lecture 23 - Slide 10 ωHI for the Common Source - the full treatment Cgd g rt + vt - + v in = v gs d + Cgs go gmv gs - The full gain expression is: {( j" ) C 2 gl s,b s,b Av ( j" ) = v out - #gt ( gm # j"Cgd ) Cgd + j" [( gl + go )Cgs + ( gl + go + gt + gm )Cgd ] + ( gl + go ) gt gs } There are two poles (call them ω1 and ω2), and one zero (call it ω3): "1 = gt [Cgs + ( gl + go + gt + gm ) rl' Cgd ] ! with rl' # ( gl + go ) $1 " 2 = ( gl + go ) Cgd + ( gl + go + gt + gm ) Cgs " 3 = gm Cgd Upon examination of these three expressions we find that ω1 << ω2, ω3, so ω1 is clearly the dominant pole, and ωHI is effectively ω1. ! Clif Fonstad, 12/3/09 Note: Cdb has been neglected to keep things simpler; it is very small. Lecture 23 - Slide 11 ωHI for the Common Source - the OCTC method Cgd g + vt - rt + v in = v gs d + Cgs gmv gs - go v out - gl s,b s,b The resistance, Rgs, seen by Cgs with Cgd removed is 1/gt, so " gs = gt Cgs That seen by Cgd with Cgs removed, Rgd, is (gl'+gt+gm)/gtgl', so " gd = gt [ g'l + gt + gm ] rl' Cgd ! Using the OCTC method we estimate ωHI as [ " * = (" #1 + " #1 ) = gt Cgs + ( g'l + gt + gm ) rl' Cgd HI gs gd #1 ! This is actually identical to the dominant pole, ω1, found using the full analysis. ! Clif Fonstad, 12/3/09 Lecture 23 - Slide 12 ωHI for the Common Source: the Miller effect In both of our analyses we note that in the dominant term Cgd is multiplied by the factor (gl'+gt+gm)rl'. Noting (1) that typically it is true that gm >> gt, and (2) that -gmrl' is the mid-band voltage gain, Av, of the amplifier, we see that this factor can be approximated as one minus the voltage gain of the stage, i.e.: (g + g + g )r ' l t m ' l = [1 + ( gt + gm ) rl' ] " [1 + gm rl' ] = (1 # Av ) If the voltage gain is large, then in effect Cgd looks bigger from the input side of the circuit than it really is, i.e. (1 - Av)Cgd: g d ! + vt - rt + v in = v gs s,b Cgs Cgd (1-Av ) gmv gs go + v out - gl s,b This "magnification" of a capacitor bridging the input and the output of a voltage amplifier, as Cgd does here, by |Av| is called the Miller effect. Clif Fonstad, 12/3/09 Lecture 23 - Slide 13 The Miller effect (general) Consider an amplifier shunted by a capacitor, and consider how the capacitor looks at the input and output terminals: Cm + vin - Av iin = Cm + ! in v - + vout d [(1 " Av )v in ] dt (1-Av)Cm Cin looks much bigger than Cm (1-Av)vin iin + + + vin Cm vout = A vvin = (1 " Av )Cm Cm dv in dt Note: Av is negative + vout - Cm (1 " Av ) Av # Cm Cout looks like Cm Clif Fonstad, 12/3/09 Lecture 23 - Slide 14 ! The Miller effect: Miller capacitors in other basic stages Common drain or source follower g Cgd ++ rt v gs Cgs gmv gs + v in vt s,b + s,b gl v out - d go Repositioning Cgd makes the situation clearer: g rt + vt - + v in + v gs Cgd Clif Fonstad, 12/3/09 d Cgs s,b gmv gs + s,b gl v out - go Cgs is in the Miller position, but the voltage gain is one so there is no Miller effect. Lecture 23 - Slide 15 The Miller effect: Miller capacitors in other basic stages Common gate, substrate grounded The way one often sees common gate stages. go rt s d + + v in = v sg - vt - (gm + gmb )v sg Cgs +Cbs Cgd +Cbd g,b + v out - gl g,b No Miller effect, just as in common-base. Common gate, substrate shorted to source This is the connection used in the design problem. Cbd rt + vt - go s,b + v in = v sg g d gmv sg Cgs Cgd + v out - gl g Now Cbd shows up in the Miller position. Clif Fonstad, 12/3/09 - But note that the gain is positive, so (1-Av) is negative and Cgs||(1-Av)Cbd is < Cgs, i.e. the Miller effect helps! Lecture 23 - Slide 16 The cascode when the substrate is grounded: VBS ≠ 0 (alternative to VBS = 0 as V+ in the design problem circuit) Schematic: Commonsource Q1 Q2 + V IN+vin - gl Commongate + V OUT+vout - VCommon-gate L.E.C. when VGS ≠ 0: go d g,b + (gm + g mb )vsg vin = vsg s s Clif Fonstad, 12/3/09 * The effective transconductance is increased by the substrate generator term. Lecture 23 - Slide 17 The cascode when the substrate is grounded, cont: VGS ≠ 0 ro2 L.E.C.: + vgs1 gm1vgs1 ro1 Av = v out = v in g + l - (gm2+gmb2 )vgs2 vgs2 + "gm1 g01 (gl + g02 ) (gm 2 + gmb 2 + g02 ) + rl vout #o " gm1 gl + g01 g02 (gm 2 + gmb 2 ) The equivalent transistor, QCC: ! g d + vgsCC s gmCC vgsCC roCC - Clif Fonstad, 12/3/09 gm,CC = gm1 s VA,CC " VA1 ro,CC " r01 go 2 (gm 2 + gmb 2 ) The output resistance is even higher! ! (gm 2 + gmb 2 ) go 2 Lecture 23 - Slide 18 The cascode when the substrate is grounded, cont: High frequency issues: L.E.C. of cascode: can't use equivalent transistor idea here because it didn't address the issue of the C's! ro2 Cgd1 g1 + vgs1 gm1vgs1 s1,b1,b2 Cgs1 ro1 Voltage gain ≈ -1 so minimal Miller effect. d2 + d1,s2,b2 - (gm2+gmb2 )vgs2 Cgd2 +Cbd2 Cdb1 +Cgs2 +Cbs2 vout vgs2 + s1,b1,g2,b2 rl g2,b2 Voltage gain ≈ gmrl, without Miller effect. Common-source gain without the Miller effect penalty! Clif Fonstad, 12/3/09 Lecture 23 - Slide 19 Multi-stage amplifier analysis and design: The µA741 Figuring the circuit out: Emitter-follower/ common-base "cascode" differential gain stage EF CB The full schematic © Source unknown. All rights reserved. This content is excluded from our Creative Commons license. For more information, see http://ocw.mit.edu/fairuse. Push-pull output Current mirror load Darlington commonemitter gain stage Simplified schematic © Source unknown. All rights reserved. This content is excluded from our Creative Commons license. For more information, see http://ocw.mit.edu/fairuse. Clif Fonstad, 12/3/09 Another interesting discussion of the µA741: http://en.wikipedia.org/wiki/Operational_amplifier Lecture 23 - Slide 20 Multi-stage amplifier analysis and design: The µA741 The chip: a bipolar IC Capacitor Resistors Transistors Bonding pads © Source unknown. All rights reserved. This content is excluded from our Creative Commons license. For more information, see http://ocw.mit.edu/fairuse. Clif Fonstad, 12/3/09 Lecture 23 - Slide 21 Multi-stage amplifier analysis and design: The µA741 Why is there a capacitor in the circuit?: the added capacitor introduces a low frequency pole. Without it the gain is still greater than 1 when the phase shift exceeds 180˚ (dashed curve). This can result in positive feedback and instability. Clif Fonstad, 12/3/09 Low frequency pole With it the gain is less than 1 by the time the phase shift exceeds 180˚ (solid curve). Lecture 23 - Slide 23 6.012 - Microelectronic Devices and Circuits Lecture 23 - Circuits at High Frequencies - Summary Bounding mid-band - finding ωHI, ωLO ωHI: Find the resistance in parallel with each device capacitor assuming the such device capacitors are open circuits, calculate all the RC time constants, and add them. The inverse is a lower bound on ωHI. ωLO: Find the resistance in parallel with each bias capacitor assuming the other such capacitors are short circuits, calculate all the 1/RC frequencies, and add them. This sum is an upper bound on ωLO. The Miller effect: why Cgd is so important The concept: a capacitor shunting a gain stage looks larger by (1 - Av) Examples: (1) The Miller effect magnifies Cgd in common-source stages; (2) There is no significant Miller effect impact on common-gate stages or on source-followers; (3) The Miller effect is used in the µA741 to get the relatively large capacitor needed to stabilize it. The Marvelous cascode Concept and ωHI: Current gain from a CS stage and voltage gain from a CG to circumvent the Miller effect. Output resistance: significantly larger than CS alone. The costs: The added device increases the voltage distance away from the rails and limits voltage swings Clif Fonstad, 12/3/09 Lecture 23 - Slide 24 MIT OpenCourseWare http://ocw.mit.edu 6.012 Microelectronic Devices and Circuits Fall 2009 For information about citing these materials or our Terms of Use, visit: http://ocw.mit.edu/terms. ...
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This note was uploaded on 11/07/2011 for the course COMPUTERSC 6.012 taught by Professor Charlesg.sodini during the Fall '09 term at MIT.

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