Chapter6_Memory - Objectives Memory Master the concepts of...

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1 CS 3401 Comp. Org. & Assembly Memory -- Chapter 6 1 Memory Memory CS 3401 Comp. Org. & Assembly Memory -- Chapter 6 2 Objectives Objectives Master the concepts of hierarchical memory organization. Understand how each level of memory contributes to system performance, and how the performance is measured. Master the concepts behind cache memory, virtual memory, memory segmentation, paging and address translation. CS 3401 Comp. Org. & Assembly Memory -- Chapter 6 3 Introduction Introduction Memory lies at the heart of the stored- program computer (Von Neumann model). In previous chapters, we studied the ways in which memory is accessed by various ISAs. In this chapter, we focus on memory organization or memory hierarchy systems. A clear understanding of these ideas is essential for the analysis of system performance. CS 3401 Comp. Org. & Assembly Memory -- Chapter 6 4 6.2 Types of Memory 6.2 Types of Memory There are two kinds of main memory: random access memory, RAM read-only-memory, ROM. There are two types of RAM, dynamic RAM (DRAM) static RAM (SRAM). DRAM consists of capacitors that slowly leak their charge over time. Thus they must be refreshed every few milliseconds to prevent data loss. DRAM is “cheap” memory owing to its simple design.
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2 CS 3401 Comp. Org. & Assembly Memory -- Chapter 6 5 6.2 Dynamic RAM 6.2 Dynamic RAM FPM RAM (Fast Page Mode RAM) -- 30 MHz b allows faster access to data in the same row or page. b works by eliminating the need for a row address if data is located in the row previously accessed. EDO RAM (enhanced data-out RAM) -- 66 MHz b can start fetching the next block of memory at the same time that it sends the previous block to the CPU BEDO RAM (burst enhanced data-out RAM) b can process four memory addresses in one burst b can only stay synchronized with the CPU clock for short periods b can't keep up with processors whose buses run faster than 66 MHz CS 3401 Comp. Org. & Assembly Memory -- Chapter 6 6 6.2 Dynamic RAM 6.2 Dynamic RAM SDRAM (synchronous dynamic RAM) -- 100 MHz b can run at much higher clock speeds than conventional memory b synchronizes itself with the CPU's bus and is capable of running at 133 MHz, about three times faster than conventional FPM RAM, and about twice as fast EDO DRAM and BEDO DRAM DDR RAM (double data rate SDRAM) – 200MHz b a type of SDRAM that supports data transfers on both edges of each clock cycle (the rising and falling edges), effectively doubling the memory chip's data throughput b DDR-SDRAM also consumes less power CS 3401 Comp. Org. & Assembly Memory -- Chapter 6 7 6.2 Static RAM 6.2 Static RAM SRAM consists of circuits similar to the D flip-flop. SRAM is very fast memory and it doesn’t need to be refreshed like DRAM does. It is used to build cache memory. ROM also does not need to be refreshed,
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Chapter6_Memory - Objectives Memory Master the concepts of...

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