Chap1 - 1 1.1 1.2 1.3 1.1.1 PVP MIMD...

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1 第第第第第第第第 1.1  并并并并并并并并并并并 1.2  并并并并 1.3  并并并并并并并并并
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1.1.1 第第第第第第第第 PVP 并并 MIMD Multiple-Instruction Multiple-Data 并并 UMA  Uniform Memory Access 并并并并并并并并并 并并并并并并并并并并并并并并并并 1G flops 并并并并并并并并并并并并并并并并并并并 并并并并并并并并并并并 SM 并并并并并并并并并并并并并 , 并并并并并并并并 并并 Cray C-90/T-9,NECSX-4,Gralaxy-1,Cray-1
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1.1.1 第第第第第第第第 PVP 并并并并 VP VP VP 并并并并 SM SM SM …… ……
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1.1.1 第第第第第第第第 PVP 并并 Cray-1, 并并并并并 并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并 并并并并并并并 并并并并并并并并并并并并并并并并并并并并并 SM 并并并并并并并并并 并并并并并并并并 8*64 并并并并并并并并 V0-V7  并并并并并并并并并并并并并并并并并 S0-S7
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1.1.1 第第第第第第第第 PVP 4 并并并并并并并 并并并并并并并并并并并并并    V op V k 并并并并并并并并并并并并并并    V op V k 并并并并并并并并并并并并并并并     Mem op V j     V op mem
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1.1.1 第第第第第第第第 PVP 并并并并 并并并并并 V4 V1+V2      V1 并并并并并并并 V5 V1*V3  并并并并并并并 V4 V1*V3       并并并并并并并 V5 V1*V6
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1.1.2 第第第第第第第 SMP 并并 MIMD,UMA, 并并并并并并并并并并并并并 并并并并并并 Cache 并并并并并并并并并 并并并并并并并并 并并并并并并并并并并并 I/O 并并并 OS 并并并 SM 并并并并并并并 并并并并并并 SM 并并并并并并 并并并 SGI 并并并并 DEC 并并并 8400 Dawning-1
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1.1.2 第第第第第第第 SMP 并并并并并 SM p/c p/c SM p/c 并并 cache SM 并并并并并并并 …… ……
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5 并并并并并
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1.1.3  第第第第第第第第第 MPP 并并 MIMD  NUMA  / 并并并并并并并 并并并并并并并并并并并并并并并并 并并并并并并并并并 并并并并并并并并并并并并并并并并并 并并并并并并并并并并并并 并并并 Intel Paragon IBM SPQ Dawning 1000
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1.1.3  第第第第第第第第第 MPP 并并并并并 P/C LM NIC P/C LM NIC Custom-Designed Network 
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第第第第第第第第第第第第第 DSM 并并 MIMS NUMA NORMA 并并并并并并并并并 No-Remote  Memory Access 并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并并 并并并并 DIR Cache
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This note was uploaded on 11/08/2011 for the course CS 11004 taught by Professor Zhiyifang during the Winter '11 term at Tianjin University.

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Chap1 - 1 1.1 1.2 1.3 1.1.1 PVP MIMD...

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