Unformatted text preview: University of Florida EEL 3701 Dr. Eric M. Schwartz Department of Electrical & Computer Engineering HOMEWORK 1 26-Aug-11 Page 1/1 Revision Note: Late HW is not accepted! HW is due at the beginning of class. Put your “last name, first name” and the HW number in the top right hand corner of the first page of all HW assignments. Staple your pages together. Do not put your social security number or your UF ID number on your HW. 1. Design by direct implementation the logic diagrams (by hand) for the following logic equations using any real 1-input , 2-input or 3-input logic gates, trying to minimize the total number of gates. You may choose any activation level for inputs and outputs that will simplify your design. (Do not simplify the equations.) a) V = A * [/(B*/C) + C*D] b) W = A*B*/C + /(A*B*C) c) XX = /(A*B + /C) (note that XX is just a single variable name) d) Y = /(A*B) * C e) Z = (/A + /B) * /C 2. Now redesign the above with any real 1-input, 2-input or 3-input logic gates, again trying to...
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This note was uploaded on 11/12/2011 for the course EEL 3701 taught by Professor Lam during the Fall '08 term at University of Florida.
- Fall '08