exam2-review - Test 2 Review Coverage Lecture 6 Lecture...

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1 Test 2 Review Coverage : Lecture 6, Lecture 7 (Part II only), Lecture 8, related reading assignments, related examples/handouts posted on the lecture page of the course website. Labs 5-7. Material you can bring: Text books, Freescale manuals, Lecture notes, Example handout, Lab materials. No other material will be allowed. Format : similar to exam 1. Restrictions : open book and notes. NO calculator is permitted. Topics: Lecture 6 Parallel I/O (1) The basic bus interface for input/output Tri-state buffer and latch: operation, important control signal (enable, clock) (2) Two ways for addressing I/O (pros and cons) and corresponding interface Memory and I/O both share address bus Memory mapped I/O: pro: simplify ISA and CPU design; con: memory address space is reduced (address spaces are not overlapped), full address decoding Separate I/O: pro: cheaper decoder; con: additional control signal (address space overlap), additional instructions (3) Address decoding (full, partial, linear) Using discrete logic circuit and 74 series decoder (4) General bus timing and interface for handshaking I/O Handshaking using READY (or WAIT)
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exam2-review - Test 2 Review Coverage Lecture 6 Lecture...

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