FET_Amp-5 - University of Saskatchewan EE 292 Electrical...

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University of Saskatchewan EE 292 Electrical Engineering Laboratory I Revised Feb 15, 2010 FET AMPLIFIERS (v5) Safety: In this lab, voltages are less than 15 volts and this is not normally dangerous if you have dry skin. However, take extra care when you have a cut or break in the skin. Objective: This lab is to learn how to design and implement FET amplifiers and learn the frequency response of real systems. Preparation: Prior to the lab , design a FET amplifier (Figure 1) with a voltage gain A V = -5. Design for V DD = 10 V, I D = 5 mA, V DS = 5 V, and R in > 100 k Ω . Assume V GS 3 V. The following analysis is appropriate for good quality transistors where the output current I D is largely independent of the output voltage V DS (the output characteristic curves are approximately “flat”). We calculate amplifier ac gain using the small signal FET transconductance g m and we assume r o can be neglected because it is very large in comparison to other circuit resistances. The small signal FET equivalent circuit is shown in the following diagram. The input resistance is essentially R 1 // R 2 and the output impedance is essentially equal to R D if r o is very large. Small signal ac gain is calculated assuming that capacitors have negligible impedance. See Appendix 1 on selecting appropriate capacitors. For I D = 5 mA, g m is approximately 50 mA/volt and 1/ g m is 20 ohms. This g m approximation is valid in the sub-threshold region (I D < 10 mA for IRFD110). Procedure: 1. Construct the amplifier, using an IRFD110 FET and other components indicated in Figure 1. Use 250 k variable resistor (potentiometer or decade box) for R 2 , set to the calculated value before connected to the circuit. Do not connect a signal generator and the capacitor C 1 to the input yet. Adjust R 2 (if necessary) until I D is approximately 5 mA. Once this has been accomplished, make note of the new value of R 2 and I D , V DS , V G , and V GS . You may now remove the ammeter (used to measure I D ) and any voltmeters. Connect capacitor C 1 and then Figure 1 FET amplifier Where g m is valid in exponential region
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University of Saskatchewan EE 292 Electrical Engineering Laboratory I 2 apply a small 1 kHz signal to measure the ac voltage gain of the circuit without load. If you have connected an oscilloscope channel directly to the drain of the FET, no coupling
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This note was uploaded on 11/10/2011 for the course COMPUTER E 444 taught by Professor Amigo during the Fall '10 term at Al-Quds University.

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FET_Amp-5 - University of Saskatchewan EE 292 Electrical...

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