csee4824_f11_lec01

csee4824_f11_lec01 - 1 CSEE W4824 – Computer Architecture...

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Unformatted text preview: 1 CSEE W4824 – Computer Architecture Fall 2011 Prof. Luca Carloni Department of Computer Science Columbia University in the City of New York http://www.cs.columbia.edu/~cs4824/ Lecture 1 Course Introduction CSEE 4824 – Fall 2011 - Lecture 1 Page 2 Luca Carloni – Columbia University Course Information – Instructor • Prof. Luca Carloni • luca @ cs.columbia.edu • office: 466 Computer Science Building • office hours: Mon. 4:00-5:00pm and Wed. 10:00-11:00am – B.S. (Univ. of Bologna, Italy), M.S. & Ph.D. (UC Berkeley) • Ph.D. dissertation title: “Latency-Insensitive Design” – Joined Columbia’s CS Department in 2004 – Research interests • design technologies for electronic systems • distributed embedded systems • computer architecture & engineering • systems-on-chip and networks-on-chip – Research papers available at www.cs.columbia.edu/~luca/ 2 CSEE 4824 – Fall 2011 - Lecture 1 Page 3 Luca Carloni – Columbia University Course Information – Educational Goals • Understand how modern computers are designed and implemented – computer architecture principles – design and implementation trade-offs • performance, cost, energy, design complexity – role of technology and market trends • not just microprocessor, but also servers and embedded systems • the arrival of multi-core architectures – case studies • not only classic processors, but also state-of-the art computers • “SW-oriented students” – write better software applications – write better system’s software • operating systems, compilers • This course is offered in the Fall semester only CSEE 4824 – Fall 2011 - Lecture 1 Page 4 Luca Carloni – Columbia University Course Information – Tentative Syllabus • Week 1 – [Sep 7] – Introduction • Week 2 – Principles of Quantitative Analysis; MIPS • Week 3 – Pipelining, Hazards, Implementation Issues • Week 4 – Instruction-Level Parallelism (ILP), Tomasulo (IBM 360) • Week 5 – [Oct. 3-5] – Memory Hierarchy Design, Cache Optimization (Itanium) • Week 6 – ILP: Branch Prediction, Speculation; Superscalars (Alpha) 3 CSEE 4824 – Fall 2011 - Lecture 1 Page 5 Luca Carloni – Columbia University Course Information – Tentative Syllabus • Week 7 – Memory Hierarchy Design, Virtual Memory (Opteron) • Week 8 – ILP: Compiler Techniques, VLIW architectures – MIDTERM (in class): Mon, Oct 31 (tentative date! ) • Week 9 - [Oct 31 – Nov 2] – Thread-Level Parallelism, SMT; (Pentium 4) • Week 10 – Multi-Core Architectures: CMP & SoC (Intel Core) • Week 11 – Parallel Architectures: Programming & Communication Models CSEE 4824 – Fall 2011 - Lecture 1 Page 6 Luca Carloni – Columbia University Course Information – Tentative Syllabus • Week 12 – Parallel Architectures: Memory Consistency and Cache Coherency • Week 13 – Multi-Core Architectures: Embedded and Mobile Computing (ARM, TI OMAP) • Week 14 - [Dec 5-7] – Multi-Core Architectures: Cloud Computing, Accelerators...
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csee4824_f11_lec01 - 1 CSEE W4824 – Computer Architecture...

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