csee4824_f11_lec11

csee4824_f11_lec11 - CSEE 4824 Fall 2011 - Lecture 11 Page...

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Unformatted text preview: CSEE 4824 Fall 2011 - Lecture 11 Page 3 Luca Carloni Columbia University Review: Reducing CPI (or Increasing IPC) CPI = CPI ideal + stalls structural + stalls dataHazard + stalls control technique reduces forwarding/ bypassing potential data-hazard stalls delayed branches control-hazard stalls basic dynamic scheduling (scoreboarding) data-hazard stalls from true dependencies dynamic scheduling with register renaming data-hazard, anti-dep. & output dep. stalls dynamic branch prediction control stalls issuing multiple instruction per clock cycle ideal CPI speculation data-hazard and control-hazard stalls dynamic memory disambiguation data-hazard stalls with memory loop unrolling control hazard stalls basic compiler pipeline scheduling data-hazard stalls compiler dependency analysis ideal CPI, data-hazard stalls software pipelining & trace scheduling ideal CPI, data-hazard stalls compiler speculation ideal CPI, data-hazard stalls CSEE 4824 Fall 2011 - Lecture 11 Page 4 Luca Carloni Columbia University Review: Control Flow and Basic Blocks int gdc (int x, int y) { while (x != y) { if (x < y) y = y x; else x = x y; } return x; } ; R5 <- X, R4 <- y begin: BE R5, R4, exit SLT R3, R4, R5 BNE R0, R3, else SUB R4, R4, R5 JMP endLoop else: SUB R5, R5, R4 endLoop: JMP begin exit: JR R31 Basic Block is a sequence of instructions without jump/branches (except possibly at the end) and without branch targets/ labels (except possibly at the beginning) Control-Flow Graph begin: BE R5, R4, exit SLT R3, R4, R5 BNE R0, R3, else SUB R4, R4, R5 JMP endLoop else: SUB R5, R5, R4 endLoop: JMP begin exit: JR R31 CSEE 4824 Fall 2011 - Lecture 11 Page 5 Luca Carloni Columbia University Review: Control Dependences Every instruction, except for those in the first basic block of a program, is control-dependent on some set of branches it cannot be moved before the branches on which it depends it cannot be moved after the branches on which it doesnt depend Control dependences do not necessarily need to be preserved, but exception behavior and data flow must be preserved DADDU R2, R3, R4 BEQZ R2, tl LW R1, 0(R2) tl: DADDU R1, R2, R3 BEQZ R4, tl1 DSUBU R1, R5, R6 tl1: OR R7, R1, R8 CSEE 4824 Fall 2011 - Lecture 11 Page 6 Luca Carloni Columbia University Why Dynamic Branch Prediction? Branch and jumps quickly become the limiting performance factor as we attempt to increase ILP the impact of control stalls grows as we reduce CPIs branches arrive up to n times faster in n-issue processors modern processors may have several pipe stages between next PC calculation and branch resolution Dynamic branch-prediction schemes where prediction depends on the behavior of the branch at run time and it changes while tracking such behavior seem to do better than static branch-prediction schemes (predict-not-taken, delayed branch,) according to the paper A Comparative Analysis of Schemes for...
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This note was uploaded on 11/12/2011 for the course CSEE 4824 taught by Professor Carloni during the Fall '11 term at Columbia.

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csee4824_f11_lec11 - CSEE 4824 Fall 2011 - Lecture 11 Page...

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