Homework8

# Homework8 - Homework8 1 Design an 8-bit register that has...

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Digital Logic Homework University of Information Technology - Computer Engineering Faculty Page 1 Homework8 1. Design an 8-bit register that has parallel load and has a synchronous reset (reset=0 resets the register). 2. Draw the logic diagram of a 4 bit register with mode selection inputs S 1 and S 0 . When S 1 S 0 =00, there is to be no change in the register contents. When S 1 S 0 =01, the value of the register is to be changed to zero. When S 1 S 0 =10 the register is to load a new value. When S 1 S 0 =11, the value is to be set to 15 (1111 2 ). All register changes should be synchronous to clock (i.e. don’t use asynchronous reset/clear). Your logic diagram should use only edge-triggered D flip flops and simple gates (AND, OR, NOT). Do not gate the clock signal. 3. Design a circuit that has a 2-bit input that is a binary number and an output that goes high when the input is the largest input that has been seen since the last reset. The output should go high as soon as possible. Reset will reset the machine such that an input of 00 will be

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Homework8 - Homework8 1 Design an 8-bit register that has...

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