Handout04 - Programmable Logic Devices I EECE143 Lecture 4...

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1 © J. Chris Perez 2001 EECE143 Lecture 4 Programmable Logic Devices I A lesson on Programmable Logic Devices and programming them using CUPL © J. Chris Perez 2001 EECE143 Lecture 4 Programmable Logic Devices I What is Programmable Logic? Digital integrated circuits where the Boolean function can be determined by the user. PLDs can replace several specific purpose ICs in a digital design. A single PLD is functionally equivalent to a specific device containing from 5 to 10,000 gates. Typically PLDs implement Boolean functions using Sum Of Minterms (SOM) or Sum of Products (SOP) form. SOM and SOP use a AND-OR gate structure.
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2 © J. Chris Perez 2001 EECE143 Lecture 4 Programmable Logic Devices I Basic Architecture of PLDs PLDs contain a pre-defined general architecture for a user to program a design into the device. Generally consists of one or more arrays of AND and OR terms Also contain flip-flops and latches to be used as storage elements for inputs and outputs Consist of programmable AND terms feeding fixed OR terms. All inputs can be AND-ed together but specific AND terms are dedicated to specific OR terms. Pins can be used as Input, Output, I/O with tri-state enables, also may have output registers. © J. Chris Perez 2001 EECE143 Lecture 4 Programmable Logic Devices I PLD Programming PLDs are manufactured in a "blank" or "erased" form. Programming is performed in concept blowing out fuses between inputs, AND gates, and OR gates in the generic AND-OR structure. An erased PLD has all fuses intact. Actual "fuses" may be implemented as: Type Function Advantages fuses one-time programmable low cost EPROM uv light erasable Reprogrammable CMOS EEPROM electrically erasable fast, easy reprogramming
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3 © J. Chris Perez 2001 EECE143 Lecture 4 Programmable Logic Devices I Fuses and Logic Implementation A blown fuse acts like the input does not exist (or a logic 1 at the input). PLD Advantages: •reduce IC package count •board space •power •shorten design time •allow for future changes (maintainability) •improve reliability (fewer packages) •generally faster •smaller inventory © J. Chris Perez 2001 EECE143 Lecture 4 Programmable Logic Devices I Date: August 20, 1992 She t of Size Document Number REV A PAL4H4.SCH Title Generic PAL4H4 Bruce Hoeppner F1 10 9 8 7 6 5 4 3 2 1 1 2 Product Terms I1 3 F2 4 5 6 I2 7 F3 8 9 I3 11 10 F4 10 I4 12 1 AND gate inputs 2 3 4 5 6 7 8 9
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4 © J. Chris Perez 2001 EECE143 Lecture 4 Programmable Logic Devices I PAL Example: Given functions w, x, y, and z. Implement with one PAL4H4. Given: Sum of Minterms
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This note was uploaded on 11/14/2011 for the course DDDD h0322 taught by Professor Whoknow during the Spring '11 term at Bina Nusantara University.

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Handout04 - Programmable Logic Devices I EECE143 Lecture 4...

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