SEMJUL08 - LECT04 - THE M68K MICROPROCESSOR COMPLETED

SEMJUL08 - LECT04 - THE M68K MICROPROCESSOR COMPLETED - The...

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The M68000 Microprocessor ECE511: Digital System & ECE511: Digital System & Microprocessor Microprocessor
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What we are going to learn in this session: M68k hardware architecture: M68k pin assignments Pin functions.
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The M68k Microprocessor M68000, M68k microprocessor. Motorola Semiconductors, 1979. 16-bit processor , but can perform 32-bit operations. Speed: 8-12 MHz.
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The M68k Microprocessor Very advanced compared to 8-bit processors: 16-bit data bus , 24-bit address bus . Can execute instructions twice as fast. Still available today: Simple, practical commands. Robust: can be used for many applications.
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The M68k Microprocessor
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The M68k Microprocessor Has 64 pins: Power supply and clock (5 pins). Processor status (3 pins). 6800 peripheral control (3 pins). System control (3 pins). Data bus (16 pins). Address bus (23 + 1 pins). Asynchronous bus control (5 pins). Bus arbitration control (3 pins). Interrupt control (3 pins).
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M68k Pin-Out CLK DTACK HALT RESET VPA BERR VMA E FC 0 FC 1 FC 2 LDS R/W UDS AS A 1 -A 23 D 0 -D 15 IPL 0 BR BG BGACK IPL 2 IPL 1 +5V GND GND V CC V CC 68000 Processor Status 6800 Peripheral Control System Control Data Bus Address Bus Asynchronous Bus Control Bus Arbitration Control Interrupt Control *A 0 is used inside 68k
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Power Supply & Clock
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CLK DTACK HALT RESET VPA BERR VMA E FC 0 FC 1 FC 2 LDS R/W UDS AS A 1 -A 23 D 0 -D 15 IPL 0 BR BG BGACK IPL 2 IPL 1 +5V GND GND V CC V CC 68000 Processor Status 6800 Peripheral Control System Control Data Bus Address Bus Asynchronous Bus Control Bus Arbitration Control Interrupt Control *A 0 is used inside 68k
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Vcc & GND Vcc: Voltage supply . Gives electrical power to 68k. 2 pins into M68k. supplies 5V (±5%) voltage. Connected to power supply. GND: Ground connection. Lower potential for current flow. 2 pins out of M68k.
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CLK Clock signal . 1 pin from timing circuit. Used for timing of: Circuits connected to M68k. Synchronous data transfer. Asynchronous data transfer (less important). 50% duty cycle: 50% up, 50% down. Fall-To-Rise, Rise-To-Fall = 10ns. Slower devices use modified signal from CLK.
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CLK Signal CLK 10 ns 10 ns 50% up 50% down
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Processor Status Pins
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CLK DTACK HALT RESET VPA BERR VMA E FC 0 FC 1 FC 2 LDS R/W UDS AS A 1 -A 23 D 0 -D 15 IPL 0 BR BG BGACK IPL 2 IPL 1 +5V GND GND V CC V CC 68000 Processor Status 6800 Peripheral Control System Control Data Bus Address Bus Asynchronous Bus Control Bus Arbitration Control Interrupt Control *A 0 is used inside 68k
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FC 0 , FC 1 , FC 2 The three most basic components in a microprocessor system are CPU, Memory and System Bus. Memory contains instructions and data. Memory is further subdivided into: Supervisor area: accessible when S = 1. User area: accessible when S = 0.
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FC 0 , FC 1 , FC 2 Function Code pins.
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