SEMJUL08 - LECT04 - THE M68K MICROPROCESSOR COMPLETED

SEMJUL08 - LECT04 - THE M68K MICROPROCESSOR COMPLETED - The...

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Unformatted text preview: The M68000 Microprocessor ECE511: Digital System & ECE511: Digital System & Microprocessor Microprocessor What we are going to learn in this session: M68k hardware architecture: M68k pin assignments Pin functions. The M68k Microprocessor M68000, M68k microprocessor. Motorola Semiconductors, 1979. 16-bit processor , but can perform 32-bit operations. Speed: 8-12 MHz. The M68k Microprocessor Very advanced compared to 8-bit processors: 16-bit data bus , 24-bit address bus . Can execute instructions twice as fast. Still available today: Simple, practical commands. Robust: can be used for many applications. The M68k Microprocessor The M68k Microprocessor Has 64 pins: Power supply and clock (5 pins). Processor status (3 pins). 6800 peripheral control (3 pins). System control (3 pins). Data bus (16 pins). Address bus (23 + 1 pins). Asynchronous bus control (5 pins). Bus arbitration control (3 pins). Interrupt control (3 pins). M68k Pin-Out CLK DTACK HALT RESET VPA BERR VMA E FC FC 1 FC 2 LDS R/W UDS AS A 1-A 23 D-D 15 IPL BR BG BGACK IPL 2 IPL 1 +5V GND GND V CC V CC 68000 Processor Status 6800 Peripheral Control System Control Data Bus Address Bus Asynchronous Bus Control Bus Arbitration Control Interrupt Control *A 0 is used inside 68k Power Supply & Clock CLK DTACK HALT RESET VPA BERR VMA E FC FC 1 FC 2 LDS R/W UDS AS A 1-A 23 D-D 15 IPL BR BG BGACK IPL 2 IPL 1 +5V GND GND V CC V CC 68000 Processor Status 6800 Peripheral Control System Control Data Bus Address Bus Asynchronous Bus Control Bus Arbitration Control Interrupt Control *A 0 is used inside 68k Vcc & GND Vcc: Voltage supply . Gives electrical power to 68k. 2 pins into M68k. supplies 5V (±5%) voltage. Connected to power supply. GND: Ground connection. Lower potential for current flow. 2 pins out of M68k. CLK Clock signal . 1 pin from timing circuit. Used for timing of: Circuits connected to M68k. Synchronous data transfer. Asynchronous data transfer (less important). 50% duty cycle: 50% up, 50% down. Fall-To-Rise, Rise-To-Fall = 10ns. Slower devices use modified signal from CLK. CLK Signal CLK 10 ns 10 ns 50% up 50% down Processor Status Pins CLK DTACK HALT RESET VPA BERR VMA E FC FC 1 FC 2 LDS R/W UDS AS A 1-A 23 D-D 15 IPL BR BG BGACK IPL 2 IPL 1 +5V GND GND V CC V CC 68000 Processor Status 6800 Peripheral Control System Control Data Bus Address Bus Asynchronous Bus Control Bus Arbitration Control Interrupt Control *A 0 is used inside 68k FC , FC 1 , FC 2 The three most basic components in a microprocessor system are CPU, Memory and System Bus....
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This note was uploaded on 11/17/2011 for the course MCT 3235 taught by Professor Dr during the Spring '11 term at International Islamic University Malaysia.

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SEMJUL08 - LECT04 - THE M68K MICROPROCESSOR COMPLETED - The...

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