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The Art of Electronics SM Transistors I

The Art of Electronics SM Transistors I - 84 Class 4...

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Unformatted text preview: 84 Class 4: Transistors I: First Model Topics: 0 Two simple views of transistor operation: — Simple: IC=IB o [3 — Simpler: If; *4 IE; VBE = 0.6V 0 Applying the models: standard circuits: ~ Follower — Current source — common—emitter amp — push—pull o 'Recapitulation: what the standard circuits look like Preliminary: Introductory Sketch An Intuitive Model: A transistor is a valve: la a flow {9 (L) «lr small conh‘ol Signal ‘ ‘ (I8) E £ (IE) Figure N4.1: A transistor is a valve (not apump!) ' ' Notice, particularly, that the transistor is not a-pump: it does not force current to flow; it permits it to flow, to a controllable degree, when the remainder of the circuit tries to force current through the device. Ground Rules: Text sec. 2.0.7 Ground Rules: For NPN type: 1. VC > VE (by at least a couple of tenths of a volt) 2. “things are arranged” so that VB — VE = about 0.6 v (VBE is a diode junction, and must be forward biased) We begin with two views of the transistor: one simple, the other very simple. (Next time we will complicate things.) N4 - 2 Class 4: Transistors I: First Model Text sec. 2.01 Pretty simple: current amplifier: IC = Beta - IE ‘11: =/3Ia I - 5\ lr,=r,_+15=(1+/s)15 Figure N41: Transistor as current-controlled valve or amplifier Very simple: say nothing of Beta (though assume it’s at work); 40 Call VBE constant (at about 0.6 v); ° C311 1C = IE‘ A. The simple View: using Beta explicitly You need the first View to understand how a follower changes impedances: small (change in-) current in ——> large (Change in-) current out: Text sec. 2.03 Lab 4 -2 . but very r/Iffemnf AI ’5 Figure N431: How a follower changes impedances 85 86 Class 4: Transistors I: First Model N4 —- 3 And here is a corny mnemonic device to describe this impedance-changing effect. Imagine an ill—matched couple gazing at each other in a dimly-lit cocktail lounge—and gazing through a rose-colored lens that happens to be a follower. Each sees what he or she wants to see: Gosh 17 Fl Svelfe, Petite 1001).? 205e- co/oreJ Jens / Figure N4.4: Follower as rose-colored lens: it shows what one would like to see Complication: Biasing \Text sec. 2.05 , . We can use a single power supply, rather than two (both positive and negative) by pulling the transistor’s quiescent voltages off-centerfbiasing it away from zero volts: +15v _ 130k Figure N45: Single-supply follower uses biasing The biasing divider must be stiff enough to hold the transistor where we want it (with Vout around the midpoint between VCC and ground). It must not be too stiff: the signal source must be able to wiggle the transistor s base without much interference from the. biasing divider. The biasing problem is the familiar one: Device A drives B; B drives C. As usual, we want Z for each element to be low relative to Zm for the next: 1 » out (a "550 "at" , bloc/cm 39"“! «915125) ”Wei/5. “A” "cl! 2? t . l M 2.; 2,; Stjna (bias) . (+ransis‘ior) Source Ki 5 Vans 7 Figure N4.6: Biasing arrangement You will notice that the biasing divider reduce the Circuit’s input impedance by a factor of ten That 1s regrettable; if you want to peek ahead to complications, see the “bootstrap’ circuit (sec 2 17) for a way around this degradation N4—4 Class 4: Transistors I: First Model 87 You will have to get used to a funny convention: you will hear us talk about impedances not only at points in a circuit, but also looking in a particular direction. Text sec. 2.05 For example: we will talk about the impedance “at the base” in two ways: the'impedance “looking into the base” (this is a characteristic of the transistor and its emitter load) _ the impedance at the base, looking batik toward the input (this characteristic is not determined by the transistor; it depends on the biasing network, and (at signal frequencies) on the source impedance. the impedance "loo/<1}: V+ In't‘o flat: £339.”. (this? . 'is a characteristic of 17 (5‘35 'flne fransisfor and [7‘s 1 L ) emiHer- load) r———>- Cblack Rsource . <—-—--i ‘ _-- EZG’MS) {he lrn edance at" ”some the base, loo/5M5 back 25 'fiwarJ ‘I'ke ln/Duf (flais charac'kn'sflé. is. 210—15 JEfPFtheJ .5} fie V- ,fransisfnrf; Il“ defends ' an 7%: biasin nefwar-ét, andJ -a\’: Slgnéz firfiuncies; an +he mum [Mada/ice.) Figure N4.7: Impedances “looking“ in specified directions B. The simplest View: forgetting Beta . We can understand—and even'design—many circuits Without thinking explicitly about ' Beta. Try the simplest View: ' Call VBE constant (at about 0.6 v); This is enough to let one predict the performance of many important circuits. This View lets one see— Text Sec. 2.03; That a follower follows: 11M = my (éhere’s a. V. 0.6V dc dnfl'erence) Figure N43: Followu- 88 Class 4: Transistors I: First Model N4 — 5 0 That a current source provides a constant output current: Text sec. 2.06 v + once V3 is fixed, $1: VE‘+oa is find, out and dam-mines IE. But IQ “IE 5v (amx) Figure N43: Current source 0" That a common-emitter amplifier shows voltage gain as advertised: Text sec. 2.07 ' V+ @ to; la, «fl; (A12) => R: “7327/9 of V094: R '- 13 AV ©leeMA=AV3 V004; (large c -> rye out) "If $® AVE) whale of Vim—1) RE toggle of VE, é {um/e »a,C Is, “In 7 (small )2: => large Arc) Figure N410: Common-emitter amp 0 That a push-pull works, and also shows distortion: Text sec. 2.14. V+ » va Jusi‘ Siamese fol/owns i. ... but: neh‘her 4’0}: wor- Qdown Conducts Qdown uni-fl I'l-s / V35'/ 2 0.6 v. - V_ Se, Here’s a dead 5€C+Ibn at "Chasm: var“ Figure N411: Push-pull Recapitulation: the important transistor circuits at a glance To get you started on the process of getting used to what bipolar transistor circuits look like, and to the crucial differences that come from what terminal you treat as output, here is a family portrait, stripped of all detail: N4 — 6 Class 4: Transistors I: First Model 89 fixed *5er . out out out in @ fixed; a in a out V fixei fixed fixed FBLLou/ER CURRENT SovkcE' A’flFL/F/ER V SmrcH Figure N412: The most important bipolar transistor circuits: sketch Next time, we will begin to use the more complicated Ebers-Moll model for the transistor. But the simplest model of the Uansistor, presented today, will remain important. We will always try to use the simplest View that explains Circuit performance, and often the very simplest will suffice. 90 Ch. 2: "Worked Example: Emitter Follower Tkxtsec.2.04 The text works a similar problem in detail: sec. 2.04} The example below differs in describing an AC follower. That makes a difference, as you will see, but the problems are otherwise very similar. ' Problem: AC-coupled follower Design a single-supply voltage follower that will allow this source to drive this load, without attenuating the signal more than 10%. Let Vcc = 15 v, let 1c quiescent be 0.5 mA. Put the 3dB point around 100 Hz. , - 1):; \ we erb/acklh Ga aclfar'fies Sllj: signfis £345 5:! 30H: 4 o l l t I l l l 1 l l t k_-L_- Figure X4.1: Emitter Follower (your design) to let given source drive given load Solution Before we begin, perhaps we should pause to recall why this circuit is useful. It does not amplify the signal voltage; in fact we concede in the design specification that we expect some attenuation; we want to limit that effect. But the circuit does something useful: before you met transistors, could you have let a 10k source drive a 4.7k load without having to settle for a good deal of attenuation? How much? The Text sets out a step-by-step design procedure for a follOwer, as we have noted already (sec. 2.04). We will follow that procedure, and will try to explain our choices as we go along, in scrupulous—perhaps painful—detail. X4 — 2 Ch. 2: Worked Example: Emitter Follower 91 1. Draw a skeleton circuit Perhaps this is obvious; but start by drawing the circuit diagram without pan values. Gradually we will fill those in. ’ v ' V+ .Sovr‘ce rm“, 6- II I load I 1 —---— I I .r ‘- I I ' l I : : : '1 I r I ‘ I : : i _ [I ‘T I _ l \__'.__J \...'__J Figure X42: Emitter follower skeleton circuit: load is AC coupled 2. Choose RE to center Vout To say this a little more carefully, we should say, center Vent-quiescent, given ICequiescent “Quiescent” meanswhat it sounds like: it means conditions prevailing with no input signal. In effect, therefore, quiescent conditions mean DC conditions, in an AC amplifier like the present design. +I5V v ill-Q =O.EMA aim for midpoint:J V: = 7.5V 7.5 ' RE I => K5 = 0.5»; = 15k Figure X43: Choose RE to center Vm 3. Center Vbas'e . _ , Here we’ll be a little lazier than the Text suggests: by centering the base voltage we will _ be sure to miss centering Vom. 'But we’ll miss by only 0.6 -v, and that error won’t matter if Vcc is big enough: the error is about 4% if we use a ‘15-'volt supply, for example. Centering the base voltage makes the divider resistors equal; that, in turn, makes their RThcvenm very easy to calculate. 92 Ch. 2: Worked Examplei Emitter Follower X4 - 3 4. Choose bias divider R’s so as to make bias stiff enough Stiff enough means, by our rule of thumb, S 1/10 Rin-at—base(DC)- If we follow that rule, we will hit the bias voltage we aimed for (to about 10%). +I5'v '/ \ +I5v ‘ Figure X4.4: Set Rm bias « Rm“ , Rimpbm is just B X RE,'as usual. That’s straightforward. What is not so obvious is that we should ignore the AC-coupled load. That load is invisible to the bias divider, because » the divider sets up DC conditions (steady state, quiescent conditions), whereas only AC ' . signals pass through the blocking capacitor to the load. ' That finishes the setting of DCconditions. Now we can finish by choosing the coupling capacitor (also called “blocking capacitor;” evidently both names fit: this cap couples one thing, blocks another). '5. Choose blocking capacitor We choose C1 to form a high—pass filter that passes any frequency of interest. Here we have been told to put f3dB around 100 Hz. The only difficulty appears when we try to decide what the relevant “R” is, in our high- pass filter: C1 —1 I R’: Rm ,6,- all/ruff ‘ = fin, (bias) ” R”; (at- base) Figure X45: What R for blocking cap as high-pass? We need to look at the input impedance of the follower, seen from this point. The bias divider and transistor appear in parallel. Digression on Series versus Parallel . Stare at the circuit till you can'convince yourself of that last proposition. If you have trouble, think of yourself as a little charge carrier—an electron, if you like—and note each place where you have a choice of routes: there, the circuit offers parallel paths; where the routes are obligatory, they are in series. Don’t make the mistake of concluding that the bias divider and transistor are in series because they appear to come one after the other as you travel from left to right. So, Zin, follower = Rm bias parallel (Rin at base). The slightly subtle point appears as you try to decide what (Rin at base) ought to be. Certainly it is B X something. But >< what? Is it just RE, which has been our usual answer? -We did use RE in choosing Rm for the bias divider. X4 — 4 Ch. 2: Worked Example: Emitter Follower 93 But this time the answer is, ‘No, it’s not just RE,’ because the signal, unlike the DC bias current, passes through the blocking capacitor that links the follower with its load. So we should put Rload in parallel with RE, this time. The impedance that gets magnified by the factor B, then, is not 15k but (15k parallel 4.7k), about 15k/4 or 3.75k. Even when increased by the factor [3, this impedance cannot be neglected for a 10% answer: R1}. = 135k parallel 375k That’s a little less than 3/4 of 135k (since 375k is a bit short of 3 X 135k, so we can think of the two resistors as one of value R, the other as 3 of those R’s in parallel (using the Text’s trick: see Ch. 1p.6, “shortcut no. 2”)). Result: we have 4 parallel resistors of 375k: roughly equivalent to 100k. (By unnatural good luck, we have landed within 1% of the exact answer, this time.) . ‘ So, choose C1 for f3d3 of 100Hz. C1 = l/(21t lOOHz- 100k) z 1/(6 . 102 ~ 100 x 103 = (1/60) x 106: 0.016 uF. C1 = 0.02 HF would be generous. ' Recapitulatz'on Here, for people who hate to read through explanations in words, is one picture restating what we have just done: 5. Choose C11 +1 5v [,3 e em I7 , is 150 iuf {a}; ”3.0on R1 A - . 2. Choose RE 40 ceni-er Vs, given IQ 4‘. Lat 37/, (bias) be << 19/” (basa); ET}, (635a) ,<_ 113 [3x15k zinc—7‘ 3. Place VB (Zul'escen't) around mid/Joint." (7.5V), mughiy denier/n5 Vaut (Us). This tie/ermine: ratio 21:22; here 81 :‘22 Figure X4.6: Follower'design: recapitulation _____-________________._____————-——-———~—-——"—_—" ...
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