This preview shows pages 1–3. Sign up to view the full content.
This preview has intentionally blurred sections. Sign up to view the full version.View Full Document
Unformatted text preview: Computer Science Comprehensive Examination Computer Architecture [60 points] This examination is open book. Please do all of your work on these sheets. Do not do your work in a blue book. By placing your number below you indicate that you agree in the spirit of the Stanford Honor Code to neither give nor receive unpermitted aid on this exam. Number: __________________________________________________ Problem Max Score Your Score 1 48 2 25 3 27 TOTAL 100 Autumn 2002 Page 1 Architecture Comp V0.3 Problem 1: Short Answer [ 4 points each, 48 points total] A. Cache A is an 8K-byte direct-mapped cache. Cache B is a 16K-byte four-way set associative cache. Cache C is a 32K-byte four-way set associative cache. All caches have sixteen-byte lines, start in the same initial state of all lines invalid, use an LRU replacement policy, and see the same sequence of memory references. After this sequence of references, which of the following statements are true. Circle all that apply. (a) Cache B will always contain every line in cache A (b) Cache C will always contain every line in cache B (c) Cache C will always contain every line in cache A B. Compared to an 8K-byte direct-mapped cache, what type of misses will a 16K-byte direct-mapped cache have fewer of? ? Circle all that apply. (a) compulsory (b) conflict (c) capacity C. Adding a cache memory to a system changes which of the following memory parameters? Circle all that apply and denote the direction of change with an up arrow or a down arrow. (a) Memory latency (b) Memory bandwidth (c) Memory address space (d) Memory reliability D. In a 32K-byte four-way set-associative cache with 32-byte blocks, how large is the index field used to address the cache array? (write down the number of bits) ___________________ E. If the cache of question D is physically tagged and physical addresses are 40-bits long, what is the minimum possible length the tag may be for correct operation? (write down the number of bits) minimum possible length the tag may be for correct operation?...
View Full Document