hw4_sol - EE108B Winter 2003-2004 Handout #35 Homework #4...

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EE108B Winter 2003-2004 Handout #35 Homework #4 (Total 85 points) Due Thurs Feb 26, 5 PM in Gates 408 1. (Total 10 points) You are building a system around a processor that runs at 1.1 GHz and has a CPI of 0.7, which excludes loading from and saving to memory. The only instructions that read or write from memory are loads (20% of all instructions) and stores (5% of all instructions). The memory system for this computer is composed of a split L1 cache that imposes no penalty on hits i.e. you may assume all hits to take exactly 1 clock cycle. Both the Instruction Cache (I-cache) and Data cache (D-cache) are direct mapped and hold 32 KB each. The I-cache has a 2% miss rate and 32-byte blocks and the D-cache is write through with a 5 % miss rate and 16 byte blocks. There is a perfect write buffer that allows single cycle writes and eliminates all stalls from the write-through D-cache. The 512 KB write-back, unified L2 cache has 64-byte blocks. It takes 15 ns to refill a L1 cache line from the L2 cache. Of all memory references sent to the L2 cache in this system, 80% are satisfied without going to main memory and 50% of all blocks are dirty. In addition, it takes 60 ns to refill a L2 cache line from main memory, and the same amount of time is needed to write from L2 cache to the main memory. Note: i. All data is stored in main memory (there is no need for a disk). ii. The caches are write-allocate, fetch on miss. iii. There is no write buffer for L2 dirty lines. iv. Give answers in nanoseconds (ns). a. (2 points) What is the AMAT for instruction accesses? Answer: AMAT inst = HitTime L1 + MissRate L1 (AMAT L2 ) AMAT L2 = HitTime L2 + MissRate L2 [MemAccessTime + DirtyRate L2 (MemAccessTime)] = 15ns + 0.2[60 ns + 0.5(60 ns)] = 33 ns (1 point) Therefore, AMAT inst = 0.91 ns + 0.02 (33 ns) = 1.57 ns (1 point ) 1
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EE108B Winter 2003-2004 Handout #35 b. (2 points) What is the AMAT for data reads? Answer: AMAT dataread = HitTime L1 + ReadMissRate L1 (AMAT L2 ) = 0.91 ns + 0.05(33 ns) = 2.56 ns c. (2 points) What is the AMAT for data writes? Answer: AMAT datawrite = HitTime L1 + WriteMissRate L1 (AMAT L2 ) = 0.91 ns + 0.05(33 ns) = 2.56 ns There has been some confusion regarding the implication of the perfect write buffer, and some of the interpretations previously given could have been incorrect or partially correct. Nevertheless, it will be all cleared out here. The L1 cache has block size of 16 bytes i.e. 4 words, and implements write- through using a write-through buffer. When the CPU wants to write to a referenced memory and the contents of the referenced memory to be updated is found in L1, then a write-hit results and the CPU writes the new value to both the L1 cache and the perfect write buffer, through which the main memory is updated in turn. ‘Perfect’ here refers to that fact that no matter how much data is fed into the buffer by the CPU, it would never result in a stall, which could result if it cannot update the main memory quickly enough. If the referenced memory the CPU wants to write to is not found in L1
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This note was uploaded on 11/18/2011 for the course EE 108A taught by Professor Dally during the Winter '04 term at Stanford.

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hw4_sol - EE108B Winter 2003-2004 Handout #35 Homework #4...

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