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**Unformatted text preview: **Mobility Boosters in Silicon MOS
1. Strain
2. Crystal Orientation
Prof. Krishna Saraswat / Aneesh Nainani
Department of Electrical Engineering
Stanford University
Stanford, CA 94305
saraswat@stanford.edu / nainani@stanford.edu
araswat
tanford University 1 EE311/Strained Si High Mobility Channels
Historic CMOS Performance vs. Scaling: the 1/LG “law”
Carrier velocity increase is
paramount for performance scaling HMOSFET delay has continued tothere (LG=10nm) and
igh mobility channel: Getting decrease because of
Saturationto boost velocity …
str-Si in carrier velocity !
proceeding beyond …
araswat
tanford University Courtesy: D. Antoniadis (MIT)
2 EE311/Strained Si 1 Impact of Channel Mobility on MOS Performance
Injected (vinj)
Back scattered (r) Nsource
Source Drive Current: ballistic transport model IDsat = qN source" inj
Drive Current: Near ballistic transport model Channel $1 # r '
IDsat = qN source" inj &
)
%1 + r ( ! Gate Delay: Drain Lgate " VDD
CLOADVDD
=
ID
(VDD # VT ) " v inj !
K. Natori, J. Appl. Phys. 15 October 1994, p. 4879
M. Lundstrom, IEEE EDL, June 2001 p.293 ! r is back scattering coefficient
νinj =µES is the injection velocity at the source ! Note that at the source µ is at low E-ﬁeld
⇒ Need high mobility High νinj Low r Increasing µ at source (low field) brings us closer to ballistic transport limit
araswat
tanford University 3 EE311/Strained Si Transistor scaling: Mobility
mb 1000 ulo Surface
Roughness Co 500 Eeff -0.3 tox=35 Å
tox=70 Å Eeff
µeffeff (2/V.sec)"
µ (cm cm2 /V-s) µ ic Phon
on Electron 300
200 -0.3 Eeff -2 Eeff Hole 100 -1 50
30
0.1 1 µm CMOS
0.2 0.3 0.1 µm CMOS 0.5
1
Eeff (MV/cm) Eeff
2 3 Mobility degrades with scaling Eeff increases with scaling Increase in substrate doping increases ionized impurity scattering Reduced gate oxide thickness increases remote charge scattering High k dielectrics have higher Coulombic scattering due to surface
araswat states and soft phonon scattering
tanford University 4 EE311/Strained Si 2 History : Strain in Semiconductors (50-60’s) araswat Smith 1954 tanford University 5 EE311/Strained Si History : Strain in Semiconductors (80-90’s)
Wafer Bending Strain gauge
Silicon/Steel <100> 45° <110> Current
Flow araswat
tanford University Y Kanda TED 1982 6 EE311/Strained Si 3 Mobility Enhancements in Strained-Si MOSFETs
(90-till date)
NMOS Gate
+
en poly
lectrode
gate oxide PMOS
LTO
spacer Strained Si
n+ Relaxed Si1-xGex n+ Si1-xGex Graded layer Mobility Enhancement Factor Si Substrate NMOS PMOS S. Thompson, et al. IEEE EDL, April 2004 araswat
tanford University 7 EE311/Strained Si What is strain? - Types of loading Tensile Compressive Shear Torsion For tensile and compressive strain
Stress and strain:
Positive for tensile loads
Negative for compressive loads araswat
tanford University 8 EE311/Strained Si 4 What is strain? – Hooke’s Law E Elastic strain is reversible
Plastic strain is irreversible and is
accompanied by damage to crystal araswat
tanford University 9 EE311/Strained Si What is strain? – Poisson’s Ratio
Elastic constants
Material 0.26 1000 0.1 748 0.18 GaAs 86 0.31 InAs 51.4 0.35 SiO2 94 Al 10 103 SiC tanford University 0.28 C araswat 130 Ge[100] Low Poisson’s ratio Poisson’s
Ratio Si [100] Typically,
High Young’s modulus Young’s
Modulus
(GPa) 64 Cu 124 W 406
EE311/Strained Si 5 Types of strain - definition Hydrostatic Biaxial Uniaxial Hydrostatic – 3 directions
Biaxial – 2 directions
Uniaxial – 1 direction
araswat
tanford University 11 EE311/Strained Si Formation of Energy Bands (1) If atoms are close to each other, potential barrier is strong, energy bands are
narrowed and spaced far apart. (Corresponds to crystals in which electrons
tightly bond to ion cores, and wave functions do not overlap much with
adjacent cores)
(2) If atoms are far apart, potential barrier is weak, energy bands are wide and
spaced close together.
araswat
tanford University 12 EE311/Strained Si 6 E-k diagrams
Ge Si GaAs Wave vector k is k= 2"
2 mE
=
#
! E " k2
Effective mass is ! m* = ! ! h
d E dk 2
2 • Effective mass is
dependent on the
curvature of a band
• Bands are parabolic at
the energy maxima or
minima
• Bands are different in
different directions araswat
tanford University 13 EE311/Strained Si Bandstructure Basics
Constant Energy Surfaces E vs. k Eg mlongitudinal Chelikowsky and Cohen mtransverse Silicon is indirect - X valley
Three hole bands – LH, HH, SO Si has 6 equivalent valleys (+k and –k)
Ellipsoids characterized by ml and mt araswat
tanford University 14 EE311/Strained Si 7 Why does strain effect the bandstructure ?
ml (z) 001 m
t (y) 010 (x)100 araswat
tanford University 15 EE311/Strained Si Why does strain effect the bandstructure ? araswat
tanford University 16 EE311/Strained Si 8 Effects of Strain
Iso-energy surface of upper valance band of GaAs
under compressive strain No strain Uniaxial Biaxial • Under strain spacing of atoms in a crystal is altered and thus the energy
band structure changes
• The shape of the constant energy surfaces changes => change in m*
A. Nainani et. al, SISPAD 2009 araswat
tanford University 17 EE311/Strained Si Desired valley property
Silicon 1
1 d2E
=2
m* ! dk 2 k = k0 DOS α (m*)3/2
! araswat
tanford University Valley should have the desired property of
- Low mtransport along channel
- High mwidth along width
- High mperpendicular normal to surface
18 EE311/Strained Si 9 Effects of Strain
2 Strain and Semiconductor Crystal Symmetry
E-k diagrams of valance band of strained Si 26 ! !
56678 57768 Heavy hole band 57768 56678
" " !
56678 57768 LH HH
Light hole band !"#$%&'()*''*+ " LH !,#$,-".-"/$$
(*&'-/*$'()*''*+ HH
!0#$%&-".-"/$
0123)*''-4*$'()*''*+ Fig. 2.8. The HH and LH bands for (a) unstressed, (b) biaxial tensile stressed, and • When spacing of atoms in a crystal Si along the the energy band structure changes
(c) uniaxial compressive stressed is altered [110] and [001] directions.
and the shape of the E-k diagrams changes Energy levels, effective mass and density of states (DOS) change Consider next the strain eﬀects on the conduction bands. The conduction
band edges are not like the valence bands, and diﬀerent semiconductors may
2
1
have them 1 diﬀerent locations in the(Brillouin zone, related to their diﬀerat d E
v α m*)-1/2 and DOS α (m*)3/2
=
ent covalent2and polar k = k0
m* ! dk 2 interactions. For example, the GaAs conduction band
edge is located at the Γ point, with L valleys about 290 meV higher. The Si
araswat
conduction bands are six ∆-valleys located along the 100 directions at about
tanford University X . Ge has its conduction band 19 0.85
edges at the L points. Strain eﬀects EE311/Strained Si
vary
for diﬀerent types of conduction valleys. For the Γ valley, since it is singly
degenerate, there is no observable splitting. Si and Ge both have multiple
!
conduction valleys, and have the star degeneracy. For Si the star degeneracy
is 6-fold and for Ge 4-fold. One may wonder why the star degeneracy for Ge is
only 4-fold since there are 8 L points. The answer lies in the structure of the
FCC Brillouin zone shown in Fig. 2.4. At each L point, only half of the valley
lies within the Brillouin zone. In fact, the two L points at the opposite ends
are equivalent. They are the same one. Similarly, if the Si conduction valleys
on
were exactly at the X points, the star degeneracy would be only 3-fold. The
trends of splitting of these valleys
to obtain. For
Silicon Band Structure due to strain are easyvalleys along x example, both biaxial and [110] uniaxial stress aﬀects the 4
and y
in an identical way in Si, but aﬀects the other 2 valleys along z diﬀerently.
(z) and
Thus, Si conduction valleys are split into the so-called ∆2 001 ∆4 valleys.
ml
Biaxial stress aﬀects the 4 L valleys of Ge identically, and thus they do not
split. The [110] uniaxial stress distinguishes the L valleys according to their
m
projection locations in the x-y plane (2 talong [110] and 2 along [¯
110]), and
thus the Ge L valleys split into 2 double-valley groups. Although there is no
(y)
splitting for the GaAs Γ valley, it has to be noted that due to the energetic010
proximity between the Γ and L valley, strain can alter the electron transport
by shifting the gap between these two valleys, since the electron occupation
of the L valley cannot usually be neglected.
(x)100 Who are the guys responsible for I ? 6 equivalent types of electrons are
involved in conduction regime of nMOS
2 types of holes are involved in conduction
regime of pMOS : heavy and light
araswat
tanford University Source: F. Boeuf (ST Microelectronics)
20 EE311/Strained Si 10 What happens in Strained-Si ?
Band structure deformation Band structure without strain Band Splitting Iso-energy ellipsoid
ml • Sub-band carrier redistribution
- Carriers occupy valleys with lighter mass
• Less intervalley phonon scattering mt mt < m l mt Mobility is increased
araswat
tanford University 21 EE311/Strained Si Subband Structure of (001) surface in strained Si?
What happens to electrons
Si MOS nstrained Silayers
Strained Si
U inversion
2-fold
perpendicular
valleys 4-fold
in-plane
valleys Lower µn <010> 3D 2-fold valle <001> <100> z 2D z (001) Ec
Higher µn c E’0 E0 araswat
tanford University In strained Si the 6 fold degenerate valleys split into
2 types of valleys. More electrons occupy the 2 fold
degenerate valleys where the conductivity effective
mass is lower and hence the mobility is higher
22 EE311/Strained Si 11 Holes in Strained Si Tensile strained Si Unstrained Si 2 fold degenerate band split into light and heavy hole bands Light hole band is at lower energy and has more holes in it Reduction in conductivity mass Supression of inter-valley scattering higher µ araswat
tanford University 23 EE311/Strained Si Redistribution in subbands and scattering
reduction
N Fermi-Dirac Unstrained Si Si/Si0.5Ge0.5 Si bulk
-0.1 HH -0.2 LH 0.1 LH >80 % in HH -0.3 SO Energy (eV) Energy (eV) Strained-Si 0.2 0.0 E(LH-HH) 0.0 < 1 % in HH -0.1 HH -0.2 -0.4 SO
-0.3 -0.5 [100] E Γ [100] [110] Γ [110] In strained Si more holes occupy the band where the conductivity
effective mass is lower and hence the mobility is higher
Source: F. Boeuf (ST Microelectronics) araswat
tanford University 24 EE311/Strained Si 12 Biaxial Strain in Strained Silicon/Germanium Source: J. Hoyt, MIT araswat
tanford University 25 EE311/Strained Si NMOS mobility – Biaxial strain Effect of biaxial strain on NMOS mobility
saturates at higher strain
araswat
tanford University (SSOI: Strained Si on insulator)
26 EE311/Strained Si 13 PMOS mobility – Biaxial strain Effect of biaxial strain on PMOS mobility also saturates
at higher strain and diminishes at higher Eeff
araswat
tanford University 27 EE311/Strained Si Strained Silicon – Biaxial strain
Device structures Strained Si
Relaxed SiGe Strained Si/SiGe
Bulk MOSFET
Co salicide
formed on
raised S/D Strained Si
Relaxed SiGe
Buried Oxide SGOI (SiGe-onInsulator) MOSFET CoSi2 on
RSD Strained
silicon Strained Si
Buried Oxide SSDOI MOSFET Silicide on
selective epi SSDOI 16 nm 60nm
Strained Si
Channel
Relaxed SiGe SiGe
Buried
oxide Buried Oxide K. Rim et al., Symp. VLSI Tech., p. 59, 2001.
K. Rim et al., Symp. VLSI Tech., p. 98, 2002. araswat B. Lee et al., IEDM 2002 K. Rim et al., IEDM, 2003. Enabling technology – grow tensile strained Si on relaxed SiGe tanford University 28 EE311/Strained Si 14 Strained Silicon – Why Uniaxial?
Biaxial strain studied extensively but…two key problems 1) Integration difficulties
- Dislocations
- Ge up-diffusion
- Fast diffusion of extensions
- Cost 2) Poor hole mobility gain
- At high Eeff LH-HH separation is
reduced
- Hole mobility gain is lost Source: Intel Corp. araswat
tanford University 29 EE311/Strained Si Strained Silicon – Uniaxial strain
Why uniaxial?
Hole mobility vs. Eeff Hole mobility enhancement Biaxial strain C. S. Smith, Phys. Rev. 1954 S. E. Thompson, IEDM Tech. Dig., 2004. araswat
tanford University High hole mobility at high Eeff Hole effective mass reduction (band warping) Increased valance band splitting Band separation is not reduced at high Eeff (high
quantization effective mass for light holes)
30 EE311/Strained Si 15 PMOS mobility - Uniaxial vs Biaxial strain Eeff=1MV/cm M. Uchida et al, SISPAD (2005) araswat Enhancement retained at high E-field tanford University 31 EE311/Strained Si NMOS mobility - Uniaxial strain [110] [001] No stress Uniaxial tensile Uniax. compr. Biaxial
tensile
S. Thompson M. Giles Mobility enhancement from:
- Valley repopulation
- Inter-valley scattering suppression
- Similar to biaxial
araswat
tanford University 32 EE311/Strained Si 16 Strained Silicon – Process induced strain
Which is best? Source: Synopsys, AMD Corp. araswat
tanford University 33 EE311/Strained Si Strained Silicon – Uniaxial strain
Device Technology
Intel’s Technology Traditional Approach Source: Intel Corp. araswat
tanford University Processed induced strain
34 EE311/Strained Si 17 Additional strain with gate last process araswat
tanford University 50% higher stress in channel with
replacement gate
35 EE311/Strained Si Ion-Ioff curves – Uniaxial strain
Technology scaling Significant performance improvements through 4 generations of
CMOS Technology
araswat
tanford University Source: Intel Corp. 36 EE311/Strained Si 18 How far can we go? – Uniaxial strain
Stress scaling Source: Intel Corp. Significant performance gains ~5X still possible for PMOS (due to reduced meff).
Performance enhancements for NMOS saturate at ~2X.
N/P performance getting comparable with strain: circuit implications.
araswat
tanford University 232 37 EE311/Strained Si Strain Roadmap: Does strain scale with dimension ? 6 Strain in Electron Devices ! ! !!
! ! ! ! !"
" !! ! !
Fig. 6.1. Strain technology for pMOSFETs in diﬀerent Si technology nodes. The
line in the ﬁgure is the modeled hole mobility as a function of longitudinal channel
strain. • Dislocations with increased Ge % in SiGe
• induce strain of S/D stressers reduces with pitch scaling
Among the two approaches which Volumeto device channels, i.e., the
wafer-based global biaxial strain and process-induced uniaxial strain, only
• Volume The global strain s much
the latter is applied in real production up to date. of nitride is tresser reduces with pitch scaling
6.1 STRAIN-SI TECHNOLOGY more complex in process and more expensive in cost, while the process-induced
strain is easy to adopt. So in this section, we will focus on the technology of the
process-induced uniaxial strain. The techniques in production to induce strain
araswat
include high stress tensile and compressive SiN capping layers and selective
epitaxial SiGe deposited University
tanford in recessed/raised source and drain (S/D). These
techniques induces uniaxial tensile stress to the nMOSFETs and compressive
stress to the pMOSFETs. Future generations will bring the SiGe closer to
the channel and increase the Ge concentration and increase the stress in the
capping layers which is approaching 3 GPa. Other possible future techniques
for process stress or mobility enhancement may include tensile shallow trench
oxide, embedded SiC for nMOSFETs and hybrid orientated (110) wafers.
Together, these techniques are expected to lead to channel stresses of 1-2
GPa approaching the stress level of wafer-based biaxial stress.
Strained-Si technology is completely compatible with the traditional Si
CMOS technology. There are only slight modiﬁcations to a standard CMOS
logic technology process ﬂow are needed to insert the longitudinal compressive and tensile stress into the p- and nMOSFETs, respectively, as shown in 38 EE311/Strained Si 19 ...

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