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Scaling_and_Technology_Trends

Scaling_and_Technology_Trends - Trends in Integrated...

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1 EE311/ Trends 1 tanford University araswat Prof. Krishna Saraswat Department of Electrical Engineering Stanford University Stanford, CA 94305 [email protected] Trends in Integrated Circuits Technology EE311/ Trends 2 tanford University araswat Outline Scaling trends Problems in scaling MOSFET Solutions for future device scaling Impact of device scaling on interconnect performance Future interconnect technology
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2 EE311/ Trends 3 tanford University araswat Semiconductors have become increasingly more important part of world economy Ref: Sze, Semiconductor Devices, 2 nd Edition, 2001 Gross World Products and Sales Volume of Various industries EE311/ Trends 4 tanford University araswat Semiconductors are America’s 2nd Largest Export Source: U.S. International Trade Commission. Industry Defined By: NAIC Codes 336411 (Aircraft); 334413 (Semiconductors); 336111 (Automobiles); 324110 (Petroleum Refinery Products) 3/28/11 4 Courtesy: Dr. Pushkar Apte, SIA
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3 EE311/ Trends 5 tanford University araswat World IC Market by Technology Ref: Sze, Semiconductor Devices, 2 nd Edition, 2001 EE311/ Trends 6 tanford University araswat Moore’s Law 10 8 10 7 10 6 10 5 10 4 10 3 10 2 10 1 10 0 10 9 10 10 60 65 70 75 80 85 90 95 00 05 10 Transistors Per Die Transistors Per Die 10 11 1K 1K 4K 16K 16K 64K 64K 256K 1M 16M 16M 4M 4M 64M 4004 4004 8080 8080 8086 80286 i386™ i386™ i486™ i486™ Pentium Pentium ® Memory Microprocessor Microprocessor Pentium ® ® II Pentium Pentium ® III III 256M 256M 512M Pentium ® 4 Itanium Itanium ® ® 1G 2G 4G 128M IC Performance to Gordon Moore’s Prediction Source: Intel
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4 EE311/ Trends 7 tanford University araswat Feature Size Trend Gate length is not true measure of transistor size as there are many other parts in a transistor much larger than the gate Reduction in transistor area has resulted in higher packing density and hence more complex chips 0.01 0.1 1 10 1970 1980 1990 2000 2010 2020 10 100 1000 10000 nm 3.0um 0.18um 0.25um 0.35um 0.5um 0.8um 1.0um 1.5um 2.0um 0.13um 65nm 90nm L GATE 0.7x / 3 year 0.7x / 2 year µ m EE311/ Trends 8 tanford University araswat MOS Device Scaling Why do we scale MOS transistors? 1. Increase device packing density ~ α 2 2. Improve frequency response (speed) ~ a 3. Power/ckt: ~1/ α 2 , power density constant 4. Improve current drive (transconductance g m ) g m = " I D " V G V D = const # W L μ n K o x t o x V D for V D < V D SAT , linear region # W L μ n K o x t o x V G $ V T ( ) for V D > V D SAT , saturation region Constant E Field Scaling All device parameters are scaled by the same factor α . • Gate oxide thickness t ox • Channel length L • Source/drain junction depth X j • Channel doping • Supply voltage V D R. Dennard, et al., IEEE Journal of Solid State Circuits, Oct. 1974.
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5 EE311/ Trends 9 tanford University araswat Speed increases as a result of scaling Source: Mark Bohr, Intel 0.01 0.1 1 10 100 0.001 0.01 0.1 1 L GATE (um) Gate Delay (ps) Limit Limit imposed by quantum mechanics Is this doable?
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