RA17 - GS between gate and source Assume g G = 10 ±²,g...

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EE40 Summer 2011 Neel Shah Reading Assignment 17 – Ch. 10.4, 11.1-11.3 8/5/2011 Boilerplate: Reading assignments are short exercises that verify your understanding of the required reading. All chapters and page numbers are in reference to “Foundations of Analog and Digital Electronic Circuits” by Anant Agarwal and Jeffrey Lang. This assignment is optional; however it may count towards a final grade boost should you require it. Consider the simple NMOS inverter from your book. Use the SRC model for the FET (like the SR model in chapter 6 but with a capacitor C
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Unformatted text preview: GS between gate and source). Assume g G = 10 ±²,g ³´ = 1 ±²,µ G = 100 Ω,µ ¶· = 10 Ω,and ¸ ´ = 5 ¸ . 1. Calculate the maximum static power dissipation in this inverter. What state are ¹ º» and ¹ ¼½¾ for the maximum power dissipation scenario? 2. What are the time constants for when the switch is on and the switch is off? 3. Draw the output waveform when ¹ º» switches between 0 ¸ and 5 ¸ every 50 ±¿ . 4. Calculate the total energy dissipated in one cycle of the input switching....
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This note was uploaded on 11/19/2011 for the course EE 40 taught by Professor Chang-hasnain during the Summer '07 term at Berkeley.

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