lect.03

lect.03 - EEL 5722C Field-Programmable Gate Array Design...

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1 EEL 5722C Field-Programmable Gate Array Design Lecture 3: HDL: Verilog & VHDL Note: Largely adopted from Purdue EE369 and Stanford EE216 notes Prof. Mingjie Lin
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2 Overview Recap + Questions? What is a HDL? Why do we need it? (simplified view) – Guess? Verilog (?) – History – Impact – Huge potential for research (surprise ) VHDL Verilog vs. VHDL
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3 HDL (Hardware Description Language) HDL is a language used to describe a digital system, for example, a computer or a component of a computer. Most popular HDLs are VHDL and Verilog – Exotic ones: bluespec, … Verilog programming is similar to C programming VHDL programming is similar to PASCAL (some say like Ada) – Is an IEEE standard
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4 Levels of description Switch Level – Layout of the wires, resistors and transistors on an IC chip Gate (structural) Level – Logical gates, flip flops and their interconnection RTL (dataflow) Level – The registers and the transfers of vectors of information between registers Behavioral (algorithmic) Level – Highest level of abstraction – Description of algorithm without implementation details
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5 Tradeoffs between Abstraction Levels Behavioral level – Easiest to write and debug, not synthesizable Register Transfer Level – Synthesizable – Uses the concept of registers (a set of flipflops) with combinational logic between them Structural level – Very easy to synthesize – A text based schematic entry system
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lect.03 - EEL 5722C Field-Programmable Gate Array Design...

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