UT_FPGA_book - Foundations and Trends R in Electronic...

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Foundations and Trends R ± in Electronic Design Automation Vol. 2, No. 2 (2007) 135–253 c ± 2008 I. Kuon, R. Tessier and J. Rose DOI: 10.1561/1000000005 FPGA Architecture: Survey and Challenges Ian Kuon 1 , Russell Tessier 2 and Jonathan Rose 1 1 The Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada, { ikuon, jayar } @eecg.utoronto.ca 2 Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, USA, [email protected] Abstract Field-Programmable Gate Arrays (FPGAs) have become one of the key digital circuit implementation media over the last decade. A crucial part of their creation lies in their architecture, which governs the nature of their programmable logic functionality and their programmable inter- connect. FPGA architecture has a dramatic e±ect on the quality of the ²nal device’s speed performance, area efficiency, and power consump- tion. This survey reviews the historical development of programmable logic devices, the fundamental programming technologies that the pro- grammability is built on, and then describes the basic understandings gleaned from research on architectures. We include a survey of the key elements of modern commercial FPGA architecture, and look toward future trends in the ²eld.
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1 Introduction Field-Programmable Gate Arrays (FPGAs) are pre-fabricated silicon devices that can be electrically programmed to become almost any kind of digital circuit or system. They provide a number of compelling advantages over ±xed-function Application Speci±c Integrated Circuit (ASIC) technologies such as standard cells [62]: ASICs typically take months to fabricate and cost hundreds of thousands to millions of dol- lars to obtain the ±rst device; FPGAs are con±gured in less than a second (and can often be recon±gured if a mistake is made) and cost anywhere from a few dollars to a few thousand dollars. The flexible nature of an FPGA comes at a signi±cant cost in area, delay, and power consumption: an FPGA requires approximately 20 to 35 times more area than a standard cell ASIC, has a speed performance roughly 3 to 4 times slower than an ASIC and consumes roughly 10 times as much dynamic power [120]. These disadvantages arise largely from an FPGA’s programmable routing fabric which trades area, speed, and power in return for “instant” fabrication. Despite these disadvantages, FPGAs present a compelling alterna- tive for digital system implementation based on their fast-turnaround and low volume cost. For small enterprises or small entities within large 136
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137 corporations, FPGAs provide the only economical access to the scala- bility and performance provided by Moore’s law. As Moore’s law pro- gresses, the ensuing difficulties brought about by state-of-the-art deep submicron processes make ASIC design more difficult and expensive.
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UT_FPGA_book - Foundations and Trends R in Electronic...

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