ece340Fall03HW16sol

# ece340Fall03HW16sol - ECE 340 Homework XVI Fall 2003 Due...

This preview shows pages 1–2. Sign up to view the full content.

ECE 340 Homework XVI Fall 2003 Due: Friday, November 21, 2003 (30 points total) 1. An n + -polysilicon-gate p-channel MOS transistor is made on an n-type Si substrate with N d = 5x10 16 /cm 3 . The SiO 2 thickness is 100Å in the gate region, and the effective interface charge Q i is 10 11 qC/cm 2 . Sketch the C-V curve for this device and give important numbers for the scale. Solutions: Looking at Fig. 6-16, the important numbers for the curve includes C i , V T , C min , and V FB , 14 72 8 3.9 8.85 10 3.4515 10 / 100 10 i CF c m d ε ×× == = × × 0.0259ln 0.389 d F i N V n φ The ms Φ can be obtained by looking up Fig 6-17, ms Φ = -0.2V. Or by assuming E F of n+ gate lies in the conduction band: 0.161 2 g ms F E V Φ= − + = (we take both answers, below we use ms Φ = -0.2V) 11 7 11 0 0.2 0.2466 3.4515 10 i FB ms i Q q VV C × =Φ − =− × 5 2 1.425 10 sF m a Wc m qN εφ × 1.14 10 / dd m Qq N W C c m × 7 7 1.14 10 2 0.2466 2 0.389 1.355 3.4515 10 d TF B F i Q V C × += × = × At maximum depletion, we have minimal capacitance: 82 7.328 10 / s d m c m W × min 6.045 10 / id CC c m × + The Figure is drawn similar to Fig 6-16 in the book. Because this is a pMOS, the channel will open if V

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
This is the end of the preview. Sign up to access the rest of the document.

## This note was uploaded on 12/01/2011 for the course ECE 340 taught by Professor Lebutron during the Fall '03 term at University of Illinois, Urbana Champaign.

### Page1 / 3

ece340Fall03HW16sol - ECE 340 Homework XVI Fall 2003 Due...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online