Lecture23_MOS_SH_6up

Lecture23_MOS_SH_6up - MOS Sample Hold EECS240 Spring 2009...

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EECS240 – Spring 2009 Lecture 23: MOS Sample and Hold Elad Alon Dept. of EECS EECS240 Lecture 23 2 MOS Sample & Hold Ideal Sampling Practical Sampling v IN v OUT C S1 φ 1 v IN v OUT C M1 φ 1 Grab exact value of V in when switch opens kT/C noise Limited bandwidth R sw = f(V in ) Æ distortion Switch charge injection Clock jitter EECS240 Lecture 23 3 Switch Resistance EECS240 Lecture 23 4 Acquisition Bandwidth Finite switch R Æ finite bandwidth Assuming constant V in and C starts at 0V: Leads to min. switch size for given bandwidth, resolution Linear settling calc. – remember may only get T/2 (Will C always start at 0V?) v IN v OUT C S1 φ 1 R () τ / 1 ) ( t in out e v t v = EECS240 Lecture 23 5 Switch R on Non-Linearity EECS240 Lecture 23 6 Sampling Distortion 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 -120 -100 -80 -60 -40 -20 0 H 1 = -49.4dBFS H 2 = -66.3dBFS H 3 = -105.2dBFS DC = -43.4dBFS A = -0.1dBFS Frequency [ f / f s ] Amplitude [ dBFS ] N = 16384 SNR = 61.9dB SDR = 49.2dB SNDR = 47.4dB SFDR = 49.3dB =
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Lecture23_MOS_SH_6up - MOS Sample Hold EECS240 Spring 2009...

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