Homework5_solution - Assignment #5 Digital Logic Design I...

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Assignment #5 – Digital Logic Design I – Combinational Logic CDA 3100, Computer Organization I  Problem 1 (40 points) Design a circuit that takes three bits X2, X1, X0, as input, and output one bit O as output. O is 1 if and only if 1<=X<=3 when X=(X2, X1, X0) is read as an unsigned integer. (a) Construct the truth table. (b) Write down the sum-of-product form of the function without any simplification in the form as: O = (X2 & X1 & X0) | (~X2 & X1 & X0) | … (this is NOT the answer). (c) Simplify the circuit using K-map. X2X 1 X0 00 01 11 10 0 1 1 1 1 X2 X1 X0 O 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 0
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(d) Write down the Verilog module for this circuit called module HW5P1 (X2, X1, X0, O). module HW5P1 (X2, X1, X0, O); input X2, X1, X0; output O; assign O = (~X2&X1)| (~X2&X0); endmodule (e) A Verilog code has been provided for this homework with an empty HW5P1 module. Please replace this module with your module and run simulation. Copy and paste the
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Homework5_solution - Assignment #5 Digital Logic Design I...

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