01_isa - Instruction Set Architecture(ISA What is an ISA...

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CIS 501 (Martin): Instruction Set Architectures 1 CIS 501 Computer Architecture Unit 1: Instruction Set Architecture Slides developed by Milo Martin & Amir Roth at the University of Pennsylvania with sources that included University of Wisconsin slides by Mark Hill, Guri Sohi, Jim Smith, and David Wood. CIS 501 (Martin): Instruction Set Architectures 2 Instruction Set Architecture (ISA) • What is an ISA? • A functional contract • All ISAs similar in high-level ways • But many design choices in details • Two “philosophies”: CISC/RISC • Difference is blurring • Good ISA… • Enables high-performance • At least doesn’t get in the way • Compatibility is a powerful force • Tricks: binary translation, μ ISAs Application OS Firmware Compiler CPU I/O Memory Digital Circuits CIS 501 (Martin): Instruction Set Architectures 3 Readings • Baer’s “MA:FSPTCM” • Chapter 1.1-1.4 of MA:FSPTCM • Mostly Section 1.1.1 for this lecture (that’s it!) • Lots more in these lecture notes • Paper The Evolution of RISC Technology at IBM by John Cocke Big Picture (and Review) CIS 501 (Martin): Instruction Set Architectures 4
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Program Compilation Program written in a “high-level” programming language C, C++, Java, C# Hierarchical, structured control: loops, functions, conditionals Hierarchical, structured data: scalars, arrays, pointers, structures Compiler : translates program to assembly Parsing and straight-forward translation Compiler also optimizes Compiler itself another application … who compiled compiler? CIS 501 (Martin): Instruction Set Architectures 5 int array[100], sum; void array_sum() { for (int i=0; i<100;i++) { sum += array[i]; } } Assembly & Machine Language Assembly language Human-readable representation Machine language Machine-readable representation 1s and 0s (often displayed in “hex”) Assembler Translates assembly to machine CIS 501 (Martin): Instruction Set Architectures 6 Example is in “LC4” a toy instruction set architecture , or ISA Example Assembly Language & ISA MIPS : example of real ISA 32/64-bit operations 32-bit insns 64 registers (32 integer, 32 FP) ~100 different insns Full OS support CIS 501 (Martin): Instruction Set Architectures 7 Example code is MIPS, but all ISAs are similar at some level Instruction Execution Model • The computer is just finite state machine Registers (few of them, but fast) Memory (lots of memory, but slower) Program counter (next insn to execute) • Called “instruction pointer” in x86 • A computer executes instructions Fetches next instruction from memory Decodes it (figure out what it does) Reads its inputs (registers & memory) Executes it (adds, multiply, etc.) Write its outputs (registers & memory) Next insn (adjust the program counter) Program is just “data in memory” • Makes computers programmable (“universal”) CIS 501 (Martin): Instruction Set Architectures 8
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01_isa - Instruction Set Architecture(ISA What is an ISA...

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