# Lec04c - COMP 4300 Computer Architecture Operations in the...

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1 COMP 4300 Computer Architecture Operations in the Instruction Set Dr. Xiao Qin Auburn University http://www.eng.auburn.edu/~xqin Fall, 2010

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2 Comparisons - What about <, <=, >, >=? bne , beq provide equality comparison slt provides magnitude comparison slt \$t0,\$s3,\$s4 # if \$s3<\$s4 \$t0=1; # else \$t0=0; Why not include a blt instruction in hardware? Supporting in hardware would lower performance Assembler provides this function if desired (by generating the two instructions) Combine with bne or beq to branch: slt \$t0,\$s3,\$s4 # if (a<b) bne \$t0,\$zero, Less # goto Less;
3 Binary Representation - Jump Jump Instruction uses J-Format (op=2) What happens during execution? PC = PC[31:28] : (IR[25:0] << 2) op address 6 bits 26 bits Conversion to word offset Concatenate upper 4 bits of PC to form complete 32-bit address

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4 Jump Example Machine language for j L5 Assume L5 is at address 0x00400020 and PC <= 0x03FFFFFF Binary Decimal/Hex op address 6 bits 26 bits 2 0x 0 1 0 0 0 0 8 000010 00 0001 0000 0000 0000 0000 1000 >>2 lower 28 bits 0x 0 1 0 0 0 0 8 31 0
5 Constants / Immediate Instructions Small constants are used quite frequently (50% of operands) e.g., A = A + 5; B = B + 1; C = C - 18; MIPS Immediate Instructions (I-Format): addi \$29, \$29, 4 slti \$8, \$18, 10 andi \$29, \$29, 6 ori \$29, \$29, 4 Allows up to 16-bit constants How do you load just a constant into a register? ori \$5, \$zero , 666 Arithmetic instructions sign-extend immed. Logical instructions don’t sign extend immed. offset 6 bits 5 bits 5 bits 16 bits I-Format op rs rt

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6 Why are Immediates only 16 bits? Because 16 bits fits neatly in a 32-bit instruction Because most constants are small (i.e. < 16 bits) Design Principle 4: Make the Common Case Fast
7 MIPS Logical Instructions and, andi - bitwise AND or, ori - bitwise OR Example and \$s2,\$s0,\$s1 ori \$s3,\$s2,252 11011111010110100100100011110101 11110000111100001111000011110000 \$s0 \$s1 \$s2 1101 0000 0101 0000 0100 0000 1111 0000 \$s3 1101 0000 0101 0000 0100 0000 1111 11 00 00000000000000000000000011111100 (252 10 )

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Lec04c - COMP 4300 Computer Architecture Operations in the...

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