Lec05a - COMP 4300 Computer Architecture Datapath Dr Xiao...

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1 COMP 4300 Computer Architecture Datapath Dr. Xiao Qin Auburn University http://www.eng.auburn.edu/~xqin [email protected] Fall, 2010
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2 Datapath for Branch Instructions beq rs, rt, offset if (R[rs] == R[rt]) then PC ← PC+4 + s_extend(offset<<2) op rs rt offset/immediate 5 5 16 RD1 RD2 RN1 RN2 WN WD RegWrite Register File Operation ALU E X T N D 16 32 Zero ADD <<2 PC +4 from instruction datapath
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3 Datapath: More Detailed View
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4 PC Instruction address Instruction Instruction memory Add Sum a. Instruction memory b. Program counter c. Adder Address Read data Data memory a. Data memory unit Write data MemRead MemWrite b. Sign-extension unit Sign extend 16 32 Simple Implementation Include the functional units we need for each instruction Read register 1 Read register 2 Write register Write Data Registers ALU Data Data Zero ALU result RegWrite a. Registers b. ALU 5 5 5 Register numbers Read data 1 Read data 2 ALU operation 4
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5 RTL Code for MIPS add 1. Fetch Instruction = ROM[PC], PC=PC+4 1. Read Operands ALUOp1 = Registers[rs-value], ALUOp2 = Registers[rt-value] 1. Add ALUOut = ALUOp1+ALUOp2 1. Write Result Registers[rd-value] = ALUOut
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