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Unformatted text preview: LSU EE 4720 Homework 1 Due: 2 March 2011 Problem 1: The MIPS code below executes on the illustrated implementation. The loop iterates
for many cycles.
25:0 IF + 29:0 = ID 15:0
NPC ME NPC
20:16 Addr Data
Data rtv D In WB
ALU rsv Addr
Addr +1 EX ALU Mem
Addr PC 30 15:0 rtv format
immed dst MD 01 IMM Decode
dest. reg 2’b0
2 Data Data
In Addr Mem
Out dst dst IR lw r2, 0(r5)
lw r1, 0(r2)
lw r3, 0(r1)
sw r3, 4(r2)
bne r3, r0 LOOP
addi r2, r3, 0
(a) Show a pipeline execution diagram for enough iterations to determine the CPI. Compute the
CPI for a large number of iterations.
(b) Show when each bypass path is used. Do so by drawing an arrow to a multiplexor input and
labeling it with the cycles in which it was used and the register. For example, something like
C10/r9 −→ to show that the input is used in cycle 10 carrying a value for r9.
Problem 2: Continue to consider the pipeline and code from the previous problem. The store
instruction and the branch could both beneﬁt from a new bypass connection.
(a) Show a new bypass connection for the store.
(b) Indicate the impact of the new store bypass connection on critical path length.
(c) Show a new bypass connection needed by the branch.
(d) Indicate the impact of the new branch bypass connection on critical path length.
(e) Suppose that the cost of the two bypass connections were equal and that both had no critical
path impact. If only one could be added to an implementation which would you add? Base your
answer not on the example code above, but on what you consider to be typical programs.
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This note was uploaded on 12/11/2011 for the course EE 4720 taught by Professor Staff during the Fall '08 term at LSU.
- Fall '08