hw02(1)

hw02(1) - LSU EE 4720 Homework 2 Due: 17 September 2010...

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Unformatted text preview: LSU EE 4720 Homework 2 Due: 17 September 2010 Problem 1: Consider the execution of the code fragments below on the illustrated implementation. format
 immed
 IR
 Addr
 25:21
 20:16
 IR
 IF
 ID
 EX
 WB
 MEM
 IR
 IR
 rsv
 rtv
 IMM
 NPC
 ALU
 Addr
 Data
 Data
 Addr
 D In
 +4
 PC
 Mem
 Port
 Addr
 Data
 Out
 Addr
 Data
 In
 Mem
 Port
 Data
 Out
 rtv
 ALU
 MD
 dst
 dst
 dst
 Decode
 dest. reg
 =
 =0
 <0
 E
 Z
 N
 NPC
 A value written to the register file can be read from the register file in the same cycle. (For example, if instruction A writes r1 in cycle x (meaning A is in WB in cycle x ) and instruction B is in ID in cycle x , then instruction B can read the value of r1 that A wrote.) As one should expect, the illustrated implementation will execute the code correctly, as...
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This note was uploaded on 12/11/2011 for the course EE 4720 taught by Professor Staff during the Fall '08 term at LSU.

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hw02(1) - LSU EE 4720 Homework 2 Due: 17 September 2010...

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