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Unformatted text preview: Name Computer Architecture EE 4720 Midterm Examination Friday, 26 March 2010, 10:40–11:30 CDT Alias Problem 1 (40 pts) Problem 2 (12 pts) Problem 3 (14 pts) Problem 4 (10 pts) Problem 5 (24 pts) Exam Total (100 pts) Good Luck! Problem 1: [40 pts] In the MIPS implementation below some wires are labeled with cycle numbers and values that will then be present. For example, c5:6 indicates that at cycle 5 the wire will hold a 6. Other wires are labeled just with cycle numbers, indicating that the wire is used at that cycle. If a value on any labeled wire is changed the code would execute incorrectly. Write a program consistent with these labels. All register numbers and immediate values can be determined. The first instruction address has been provided, show the addresses of the remaining four instructions . The third instruction is an addi , don’t forget to show its registers and immediates. If an instruction is a load or store, show all possible size and sign possibilities. For example, (lw,lh) format immed IR Addr 25:21 20:16 IF ID EX WB ME rsv rtv IMM NPC ALU Addr Data Data Addr D In +1 PC Mem Port Addr Data Out Addr Data In Mem Port Data Out rtv ALU MD dst dst dst Decode dest. reg NPC = 30 2 2’b0 + 15:0 25:0 29:26 29:0 0 1 15:0 C2:2 C3:2 C5:2 C1 C5:6 C3:1 C5:0 C3:8 C5:3 C6 C5 C3:16 C5 ...
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This note was uploaded on 12/11/2011 for the course EE 4720 taught by Professor Staff during the Fall '08 term at LSU.
- Fall '08