cs61C-sp11-final-Garcia-soln

# cs61C-sp11-final-Garcia-soln - C and MIPS Assembly...

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C and MIPS Assembly Programming Following is the definition of the Ackermann function (thanks, Wikipedia), which is defined over the domain of non-negative integers: a) Complete the following C function, ack , so that it computes the Ackermann function correctly. unsigned int ack(unsigned int m, unsigned int n) { unsigned int answer; if(m == 0) answer = n+1; else if(n == 0) answer = ack(m-1, 1); else answer = ack(m-1, ack(m, n-1)); return answer; }

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b) Write MIPS assembly that implements ack correctly. m and n are passed in a0 and a1 , respectively. We’ve provided the prologue and epilogue for you. s0 and s1 are saved and restored, so you can safely use them if you need to preserve values across function calls. addiu \$sp, \$sp, -12 sw \$ra, 0(\$sp) sw \$s0, 4(\$sp) sw \$s1, 8(\$sp) # the m == 0 case bne \$a0, \$0, elseif addiu \$v0, \$a1, 1 # answer = n + 1 j epilogue # the m != 0, n == 0 case elseif: bne \$a1, \$0, else addiu \$a0, \$a0, -1 # arg0 = m-1 li \$a1, 1 # arg1 = 1 jal ack # answer = ack(m-1, 1) j epilogue # the final case else: addiu \$a1, \$a1, -1 # arg1 = n-1. arg0 is already m. move \$s0, \$a0 # preserve m jal ack # v0 = ack(m, n-1) addiu \$a0, \$s0, -1 # arg0 = m-1 move \$a1, \$v0 # arg1 = ack(m, n-1) jal ack # answer = ack(m-1, v0) epilogue: lw \$ra, 0(\$sp) lw \$s0, 4(\$sp) lw \$s1, 8(\$sp) addiu \$sp, \$sp, 12 jr \$ra
AMAT The average memory access time (AMAT) is: AMAT = Hit Time L1 + Miss Rate L1 x Miss Penalty L1 (a) Write down the AMAT equation for a two level cache (Use HT for hit time, MR for Local Miss Rate, and MP for Miss Penalty): AMAT = HT L1 + MR L1 x (HT L2 + MR L2 x MP L2 ) (b) Given the following specifications: For every 1000 CPU-to-memory references: 40 will miss in L1\$ 20 will miss in L2\$ L1\$ hits in 1 clock cycle L2\$ hits in 10 clock cycles Main memory access is 100 clock cycles There are 1.3 memory references per instruction Ideal CPI is 1. Answer the following questions: (i) What is the local miss rate in the L2\$? 20 / 40 = 50%

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## cs61C-sp11-final-Garcia-soln - C and MIPS Assembly...

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