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ISSCC 2009 / SESSION 11 / TD: TRENDS IN WIRELESS COMMUNICATIONS / 11.4
11.4 Towards Terahertz Operation of CMOS Swaminathan Sankaran1,2, Chuying Mao1, Eunyoung Seok1,2,
Dongha Shim1, Changhua Cao1,3, Ruonan Han1, Daniel J. Arenas1,
David B. Tanner1, Stephen Hill4, Chih-Ming Hung2, Kenneth K. O1
University of Florida, Gainesville, FL, 2Texas Instruments, Dallas, TX
NXP Semiconductors, Austin, TX, 4Florida State University, Tallahassee, FL 1
3 The electromagnetic spectrum between 300GHz and 3THz is broadly referred
as terahertz . The utility of this portion of spectrum for detection of chemicals and bio agents, for imaging of concealed weapons, cancer cells and manufacturing defects [1, 2], and for studying chemical species using electron
paramagnetic resonance, as well as, in short range radars and secured high
data rate communications has been demonstrated. However, high cost and
low level of integration for III-V devices needed for the systems have limited
their wide use. The improvements in the high frequency capability of CMOS
have made it possible to consider CMOS as a lower cost alternative for realizing the systems that can greatly expand the use of this spectrum range.
A conceptual diagram of a THz spectrometer for chemical detection shown in
Fig. 11.4.1 consists of a transmitter with a tunable signal generator and an
antenna, and a receiver with an antenna, a detector or a mixer followed by a
low noise amplifier/filter. The key components are signal generator, diode
detector or mixer, and antennas. This paper reports a new polysilicon gate
separated Schottky barrier diode structure (PGS SBD) which enables operation of receivers at frequencies higher than that limited by the transistors;
examples of the building blocks with on-chip antennas operating at 100 to
400GHz, which suggest the use of CMOS in THz applications; and a potential
path to realize 1THz operation in CMOS.
Figure 11.4.2 shows the projected requirements for NMOS unity current gain
and power gain frequencies (fT and fmax) from the 2006 International Road Map
for Semiconductors (ITRS). It also shows the measured fT and fmax in the literature. Despite the concern for the slow down in ITRS, the industry has kept
up with the road map to date. The highest fT and fmax of bulk transistors are
360 and 420GHz, while the highest fT of SOI transistors is 485GHz. If this can
be kept up for another three years, NMOS transistors with fT and fmax close to
600GHz will be available. With such devices, amplifiers tuned at 300GHz or at
the lower limit of the THz region will be possible.
Figure 11.4.3 shows a cross section of new PGS SBD’s fabricated in logic
CMOS without any process modifications that can increase the circuit operating frequency beyond that limited by the transistors. The cathode and anode
are separated by a polysilicon gate layer. The measured cut-off frequency (fT)
at the 130nm generation is ~2THz. The fT of this diode unlike that of the shallow trench separated (STS) SBD’s  also in Fig. 11.4.3 should scale better
with technology scaling due to the elimination of the n-well region below the
Schottky contact surrounded by an STI ring. Such diodes will enable frequency multipliers, detectors and mixers operating at ~600GHz.
A 250GHz modulated signal generator with an on-chip patch antenna is
demonstrated in a 90nm logic CMOS technology with 9 copper layers and a
pad layer (Fig. 11.4.4). Its maximum measured radiated power at 250GHz is
-32dBm (Fig. 11.4.6). The spectrum is measured using a Bruker 113V Fourier
Transform Infrared Spectroscopy System, while the power is measured with a
silicon bolometer. The 10 to 30MHz square wave modulation signal is generated by a ring oscillator using differential inverters with programmable delays.
The ring oscillator output turns on and off the PMOS current source of a pushpush VCO with NMOS cross-coupled topology  shown in Fig. 11.4.4 to
amplitude/frequency modulate the output. At the virtual ground nodes, the
fundamental signal is attenuated, and the 2nd harmonic is extracted. Matching
networks using coplanar waveguides with a ground plane (metal 1 and metal
2 shunted together) provide high impedance at the 2nd harmonic frequency.
The pad layer is used for the signal line. The extracted 2nd harmonic is radiated through a patch antenna formed using a pad layer with a size of 330 x
315µm2. The ground plane once again is formed using the metal 1 and 2 lay- 202 • 2009 IEEE International Solid-State Circuits Conference ers. The dielectric thickness from the ground plane to patch is ~7µm. The simulated antenna efficiency is 32% at 250GHz. A die micrograph is shown at the
bottom of Fig. 11.4.7.
As a step toward realizing diode circuits operating in the THz regime, a
250GHz Schottky detector is also fabricated using 90nm CMOS (Fig. 11.4.5
and left side of Fig. 11.4.7). The diode is formed with 14 0.28 x 0.28µm2 cells
of PGS SBD’s. The detector consists of an on-chip patch antenna, a matching
circuit, a Schottky diode, a low-pass filter, and an amplifier. The diode is connected in shunt to reduce the impact of parasitics of the n-well. The diode is
forward biased through a 2.5kΩ (R1) resistor. TL1, TL2 and C1 comprise a
matching circuit. C1 and C2 provide isolation between RF and baseband signals. The antenna and transmission lines are similar to that of the 250GHz signal generator. The simulated performance parameters are listed in Fig. 11.4.6.
STS SBD’s are also used to demonstrate a 110 to 140GHz frequency doubler
in 130nm logic CMOS with measured output power of -1.5dBm and conversion efficiency of ~10% at 125GHz (Fig. 11.4.6). The diode has a large n+ cathode contact area for lower resistance . This increases the n-well to substrate capacitance. To mitigate the effects of this, a balanced topology with
two shunt diodes  (32 × 0.64 × 0.64µm2) with grounded n-wells is utilized.
The diode size is chosen to optimize the grading coefficient, mj (0.49) and cutoff frequency (680GHz) for lower conversion loss. The matching and filtering
networks are formed with 50 and 72Ω coplanar waveguides with a ground
plane. Quarter wave open stubs at input and output are used to attenuate the
second order harmonic and fundamental signals (center of Fig. 11.4.7). The
diode is reverse biased for higher efficiency.
Combining the recent 410GHz push-push oscillator result  with frequency
quadrupling  and second-harmonic odd mode coupling for quadrature generation , an 800GHz phase-locked loop (PLL) is being developed. The
410GHz oscillator  was fabricated using low leakage transistors in a 45nm
CMOS technology (top right side of Fig. 11.4.7). The schematic is the same as
the oscillator core in Fig. 11.4.4. The low radiated power of -49dBm (Fig.
11.4.6) is mostly due to the losses of thin metal and dielectric layers. If the top
metal layer thickness and the dielectric layer thickness to ground are
increased to ~3 and 6µm, the resulting increases for Q’s of inductors and
transmission lines, and the increase of antenna efficiency are expected to raise
the power to ~ -20dBm. Using injection locked frequency dividers that divide
the 200GHz fundamental signal to 50GHz followed by static dividers in a PLL
, it should be possible to lock the frequency-doubled 400GHz signal. The
measurements, simulations, and projection indicate that CMOS should be able
to handle THz applications, and 1THz operation of a CMOS circuit will be possible within the next few years.
The authors are grateful to UMC and TI for fabrication. This work is partially supported
by SRC (ID: 1836).
 P. H. Siegel, “Terahertz technology,” IEEE Trans. Microwave Theory and Techniques,
vol. 50, no. 3, pp. 910-928, Mar. 2002.
 D. L. Woolard et al., “Terahertz Frequency Sensing and Imaging, a Time of Reckoning
Future Applications?” IEEE Proceedings, vol. 93, no. 10, pp. 1722-1743, Oct. 2005.
 S. Sankaran, and K. K. O, “Schottky Barrier Diodes for Millimeter Wave and Detection
in a Foundry CMOS Process,” IEEE Electron Device Letters, vol. 26, no. 7, pp. 492-494,
 E. Y. Seok et al., “410-GHz CMOS Push-push Oscillator with a Patch Antenna,” ISSCC
Dig. Tech. Papers, pp. 472-473, Feb. 2008.
 Y. Lee, J. R. East and L. P. B. Katehi, “High Efficiency W-Band GaAs Monolithic
Frequency Multipliers”, IEEE Trans. Microwave and Theory and Techniques, vol. 52, pp.
529-535, Feb. 2004.
 D. Huang et al., “ A 324 GHz CMOS Frequency Generator Using a Linear
Superposition Technique,” ISSCC Dig. Tech. Papers, pp. 474-475, Feb. 2008.
 S. L. J. Gierkink et al., “A Low-Phase-Noise 5-GHz CMOS Quadrature VCO using
Superharmonic Coupling,” IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1148-1154,
 C. Cao and K. K. O, “A 50-GHz Phase-locked loop in 0.13-µm CMOS,” IEEE J. of SolidState Circuits, vol. 42, no. 8, pp. 1649-1656, Aug. 2007. 978-1-4244-3457-2/09/$25.00 ©2009 IEEE Please click on paper title to view Visual Supplement.
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ISSCC 2009 / February 10, 2009 / 10:15 AM Figure 11.4.2: High frequency capabilities of NMOS transistors and PGS SBD’s. Figure 11.4.1: Conceptual diagram of THz spectrometer. 11 n-terminal ILD ILD
STI Schottky terminal l1 ls ILD
STI STI Schottky terminal ILD n+
separator l2 n-terminal ILD n+ n-well Ti/CoSi2-Si
Schottky Contact ILD
Schottky Contact ILD
STI STI ILD
n+ STI current l1 l2 p-substrate n-well l2 l1 ls l1 l2 p-substrate Figure 11.4.3: PGS and STS SBD’s. Figure 11.4.4: Schematic of 250GHz modulated signal generator. μ Figure 11.4.5: Schematic of 250GHz diode detector. μ Figure 11.4.6: Performance summary. DIGEST OF TECHNICAL PAPERS • Please click on paper title to view Visual Supplement.
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ISSCC 2009 PAPER CONTINUATIONS Figure 11.4.7: Die micrographs. • 2009 IEEE International Solid-State Circuits Conference 978-1-4244-3457-2/09/$25.00 ©2009 IEEE Please click on paper title to view Visual Supplement.
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