hypothetical_computer - The Hypothetical Computer Based on...

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The Hypothetical Computer: Based on Appendix C Instruction Set Operation Opcode Example Meaning LOAD 1 1 1 8C Load R1 with contents of memory location 8C LOAD 2 2 0 5E Load R0 with the constant value 5E STORE 3 3 E 2A Store value of register RE into memory location 2A MOVE 4 4 0 12 Move contents of register R1 into R2 ADD 5 5 2 01 Add contents of R0 and R1 and put the result in R2 (2's comp) ADD 6 6 3 01 Add contents of R0 and R1 and put result in R3 (floating point) OR 7 7 C 56 OR contents of R5 and R6 an put result in register RC AND 8 8 9 34 AND contents of R3 and R4 and put result in register R9 XOR 9 9 0 32 XOR contents of R3 and R2 and put result in register R0 ROTATE A A 5 04 Rotate contents of R5 to the right 4 times JUMP B B 3 4C Jump to location 4C, contents of R3 is equal to contents of R0 HALT C C 0 00 Halt execution of the program Memory Capacity = 2 8 cells x 1 bytes/cell = 2 8 bytes Program Counter holds address of next instruction (8 bits or 1 byte) Instruction Register holds a copy of current instruction (16 bits = 2 bytes) Each of the 16 registers R0 through RF can hold 8 bits The instruction format: opcode source/destination operands register (2 registers or 1 mem. addr.) 4 bits 4 bits 8 bits Example: 1 4 C5
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hypothetical_computer - The Hypothetical Computer Based on...

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