lecture13

lecture13 - Lecture 13 ALU Sequential Logic Two Concepts...

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Lecture 13: ALU & Sequential Logic
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Two Concepts Combinational Logic Output of the logic only depends on the value of the input e.g: adder, mux Sequential Logic Output of the logic depends on not only the input but also the previous state of the logic e.g. register, memory, trafFc light control
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An Abstract View of the CPU Data Out Clk 5 Rw Ra Rb 32 32-bit Registers Rd ALU Clk Data In Data Address Ideal Data Memory Instruction Instruction Address Ideal Instruction Memory Clk PC 5 Rs 5 Rt 32 32 32 32 A B Next Address Control Datapath Control Signals Conditions
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MUX & ALU
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Data Multiplexor (here 2- to-1, n-bit-wide) “mux” C=A if S=0 C=B if S=1
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N instances of 1-bit-wide mux
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Arithmetic and Logic Unit Most processors contain a special logic block called “Arithmetic and Logic Unit” (ALU) We’ll show you an easy one that does ADD, SUB, bitwise AND, bitwise OR
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Our simple ALU
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Arithmetic Logic Units (1) A 1-bit ALU.
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Eight 1-bit ALU slices connected to make an 8-bit ALU. The enables and invert signals are not shown for simplicity.
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lecture13 - Lecture 13 ALU Sequential Logic Two Concepts...

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