Caches - Caching Chapter 7 Basics (7.1,7.2) Cache Writes...

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Caching – Chapter 7 Basics (7.1,7.2) Cache Writes (7.2 - p 483-485) DRAM configurations (7.2 – p 487-491) Performance (7.3) Associative caches (7.3 – p 496-504) Multilevel caches (7.3 – p 505-510)
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Memory Hierarchy CPU L1 L2 Cache DRAM Speed Fastest Slowest Size Smallest Largest Cost/bit Highest Lowest Tech SRAM (logic) SRAM (logic) DRAM (capacitors)
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Program Characteristics Temporal Locality Spatial Locality
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Locality Programs tend to exhibit spatial & temporal locality. Just a fact of life. How can we use this knowledge of program behavior to design a cache?
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What does that mean?!? 1. Architect: Design cache that ______________ 2. Programmer: When you program, __________ ________________________________ locality Java - difficult to do C - more control over data placement Note: Caches exploit locality. Programs have varying degrees of locality. Caches do not have locality!
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Exploiting Spatial & Temporal Locality 1. Cache: 2. Program:
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What do we put in cache? Temporal Locality Spatial Locality
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Where do we put data in cache? Direct-mapped Limit each piece of data to one possible position Search is quick and simple
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Direct-Mapped Cache 00 01 10 11 0100 00 1000 00 1100 00 Memory 0001 00 0101 00 1001 00 1101 00 One block (line) blocksize (linesize) = 2 words wordsize = 4 bytes Index 0000 00
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How do we find data in cache? Direct-mapped Block (Line) size = 2 words(8 bytes) 00 01 10 11 Byte Address 0b100100100 Where do we look in the cache? How do we know if it is there? Data Index
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00 01 10 11 Direct-Mapped Cache Data Tag Valid 0 0 0 0 0b 10 10 0 01 Tag Index Byte Offset Block Offset Example 2 - Block size=2 words
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Byte Offset: Which _____ within _____? Block Offset: Which _____ within ______? Set: Group of ______ checked each
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This note was uploaded on 12/27/2011 for the course CMPSC 154 taught by Professor Franklin during the Fall '09 term at UCSB.

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Caches - Caching Chapter 7 Basics (7.1,7.2) Cache Writes...

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