Lec12n13 - Pipelining 6.1 6.2 Performance Measurements...

Info icon This preview shows pages 1–19. Sign up to view the full content.

View Full Document Right Arrow Icon
Pipelining 6.1, 6.2
Image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Performance Measurements Cycle Time: Time __________________ Latency: Time to finish a _____________, start to finish Throughput: Average ______________ per unit time CyclesPerJob: On average, number of _______________________________.
Image of page 2
Goals Faster clock rate Use machine more efficiently No longer execute only one instruction at a time
Image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Laundry Laundry-o-matic washes, dries & folds Wash : 30 min Dry : 40 min Fold : 20 min It switches them internally with no delay How long to complete 1 load? ______
Image of page 4
Laundry-o-Matic - SingleCycle Minutes Load 1 2 3 0 30 60 90 120 150 180 210 240 270 W F D
Image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Laundry-o-Matic Cycle Time: Clothing is switched every ____ minutes Latency: A single load takes a total of ______ minutes Throughput: A load completes each ______ minutes CyclesPer Load : Every ____ cycle(s), a load completes
Image of page 6
Pipelined Laundry Split the laundry-o-matic into a washer, dryer, and folder (what a concept) Moving the laundry from one to another takes 6 minutes
Image of page 7

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Pipelined Laundry Minutes Load 1 2 3 0 30 60 90 120 150 180 210 240 270 W F Switch all loads at the same time D
Image of page 8
Pipelined Laundry Cycle Time: Clothing is switched every ____ minutes Latency: A single load takes a total of ______ minutes Throughput: A load completes each ______ minutes CyclesPer Load : Every ____ cycle(s), a load completes
Image of page 9

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Single-Cycle vs Pipelined _________ has the higher cycle time _________ has the higher clock rate _________ has the higher single-load latency _________ has the higher throughput _________ has the higher CPL (Cycles per Load ) More stages makes a _______ clock rate
Image of page 10
Obstacles to speedup in Pipelining W F D 1. 2. Ideal cycle time w/out above limitations with n stage pipeline:
Image of page 11

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Image of page 12
Creating Stages Fetch – get instruction Decode – read registers Execute – use ALU Memory – access memory WriteBack – write registers Fetch Decode Execute Memory WriteBack IF WB MEM ID
Image of page 13

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Pipelined Machine Read Addr Out Data Instruction Memory PC 4 src1 src1data src2 src2data Register File destreg destdata op/fun rs rt rd imm Addr Out Data Data Memory In Data 32 Sign Ext 16 << 2 << 2 Pipeline Register Fetch (Writeback) Execute Decode Memory
Image of page 14
In what cycle was $s1 written? In what cycle was $s4 read? In what cycle was the Add executed? Time-> add $s0, $0, $0 lw $s1, 0($t0) sw $s2, 0($t1) or $s3, $s4, $t3 IF ID IF ID IF MEM ID IF 1 2 3 4 5 6 7 8 ID WB MEM WB MEM WB MEM WB
Image of page 15

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Performance Analysis Measurements related to our machine Job = single instruction Latency - Time to finish a complete _______________, start to finish. Throughput – Average ______________ completed per unit time. CyclesPerInstruction – An _________ completes each how many cycles? Which is more important for reducing program execution time?
Image of page 16
Machine Comparison FetchDecode Execute Memory WriteBack 2ns 1ns 2ns 2ns 1ns 0.1 ns pipeline register delay Single-Cycle Implementation Clock cycle time: _____ ns Latency of a single instruction: _____ ns Throughput for machine: _____ inst/ns Pipelined Implementation Clock cycle time: _____ ns Latency of a single instruction: _____ ns Throughput for machine: _____ inst/ns
Image of page 17

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Example 2 – How do we speed up pipelined machine?
Image of page 18
Image of page 19
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

What students are saying

  • Left Quote Icon

    As a current student on this bumpy collegiate pathway, I stumbled upon Course Hero, where I can find study resources for nearly all my courses, get online help from tutors 24/7, and even share my old projects, papers, and lecture notes with other students.

    Student Picture

    Kiran Temple University Fox School of Business ‘17, Course Hero Intern

  • Left Quote Icon

    I cannot even describe how much Course Hero helped me this summer. It’s truly become something I can always rely on and help me. In the end, I was not only able to survive summer classes, but I was able to thrive thanks to Course Hero.

    Student Picture

    Dana University of Pennsylvania ‘17, Course Hero Intern

  • Left Quote Icon

    The ability to access any university’s resources through Course Hero proved invaluable in my case. I was behind on Tulane coursework and actually used UCLA’s materials to help me move forward and get everything together on time.

    Student Picture

    Jill Tulane University ‘16, Course Hero Intern