EE 541, Fall 2009: Course Notes #4Coupled Inductor, Constant Resistance, Broadband Delay Filter Dr. John Choma Professor of Electrical Engineering University of Southern California Ming Hsieh Department of Electrical Engineering University Park: Mail Code: 0271 Los Angeles, California 90089–0271 213–740–4692 [USC Office] 213–740–8677 [USC Fax] [email protected]ABSTRACT: This paper develops a three-terminal delay filter whose topology is an interconnection of only ideally lossless, coupled inductors and capacitors. In the absence of significant capacitive loading at the input and/or output ports, the proposed filter emulates an all-pass network whose low frequency delay is twice that afforded by the poles of the proposed circuit. Moreover, the driving point input and output impedances of the struc-ture are frequency invariant resistances whose values over the frequency spectra of inter-est are independent of the envelope delays achieved. These impedance characteristics allow for the convenient implementation of a cascade of match-terminated delay filter sections, thereby allowing for reasonably large envelope delays without incurring band-width penalties in either the magnitude or the delay responses. An example demonstrates the feasibility of designing a filter providing zero frequency delays in the mid-hundreds of picoseconds that remain nominally constant for signal frequencies extending through a few gigahertz. Correspondingly, the magnitude responses of these delay structures offer 3-dB bandwidths that can be significantly larger than the frequencies at which the ob-served envelope delays decay monotonically to a user-defined percentage of their respec-tive zero frequency values.Original: August 2006
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