Discussion_03

Discussion_03 - and wait for load to be asserted again. (2)...

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Simple Register File Design (From http://6004.csail.mit.edu/6.371/handouts/L03.pdf ) Example: 2-read, 1-write 32-location register file module regfile(ra1,rd1,ra2,rd2,clk,werf,wa,wd); input [4:0] ra1; // address for read port 1 (Reg[RA]) output [31:0] rd1; // read data for port 1 input [4:0] ra2; // address for read port 2 (Reg[RB], Reg[RC] for ST) output [31:0] rd2; // read data for port 2 input clk; input werf; // write enable, active high input [4:0] wa; // address for write port (Reg[RC]) input [31:0] wd; // write data reg [31:0] registers[31:0]; // the register file itself (local) // read paths are combinational // logic to ensure R31 reads as zero is in main datapath assign rd1 = registers[ra1]; assign rd2 = registers[ra2]; // write port is active only when WERF is asserted always @( posedge clk) if (werf) registers[wa] <= wd;
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Parallel In Serial Out (PISO) (1) Once all eight data bits have been clocked out, return to the idle state
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Unformatted text preview: and wait for load to be asserted again. (2) When out_valid =1b1, the PISO will not take any data_in even if Load = 1b1 Traffic light Controllers Traffic light A (L_A) Traffic light B (L_B) L_P Period S0 RED(2b01) GREEN(2b00) STOP(1b0) 7 clock cycles (or less) S1 RED(2b01) YELLOW(2b10) STOP(1b0) 2 clock cycles S2 GREEN(2b00) RED(2b01) STOP(1b0) 7 clock cycles (or less) S 3 YELLOW(2b10) RED(2b01) STOP(1b0) 2 clock cycles S4 RED(2b01) RED(2b01) GO (1b1) 7 clock cycles S 5 FLASH RED (2b11) FLASH RED (2b11) STOP(1b0) N/A (When ERR=1) 1) If there is no pedestrian pushing the button P, 2) If any pedestrians push the button P ( synchronous active high ), -If the current state is S1 or S3 -If the current state is S0 or S2 If remaining clock is less or equal to 3 clock cycles, the system will complete State2/0 without shortening the remain cycles of State2/0....
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This note was uploaded on 12/22/2011 for the course EE 577 at USC.

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Discussion_03 - and wait for load to be asserted again. (2)...

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