lect3 - Lecture 3 Lecture Finite State Automata Models...

Info iconThis preview shows pages 1–7. Sign up to view the full content.

View Full Document Right Arrow Icon
Lecture 3 Lecture 3 Finite State Automata Models Finite State Automata Models Hierarchy, Abstraction, Implementation Forrest Brewer
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
What is Modeled? What is Modeled? System Input/Output sequences modeled “State” set of properties occurring at a given time “Inputs” and “Outputs” are the observable features of the system “Transitions” allowed or observed pair-wise sequencing of states Both states and transitions are inferred from the input/output sequence If the transitions only depend on the current state, the machine is a Clock . If the outputs depend only on the state Moore else Mealy FSM Key assumption: the total memory available for states and the alphabet of input and output symbols is finite .
Background image of page 2
Finite State Machines Finite State Machines FSM = ( {Input symbols}, {Output Symbols}, {States}, {Initial States}, Transition Relation (mapping of Input Symbol, Current State to next State(s) Output Function (mapping of Input Symbol, Current State to Current Output Symbol) ) Often suitable for controllers, protocols Rarely suitable for Memory and Datapaths Little abstraction power for large alphabets Powerful algorithms for verification Easy to synthesize, but can be inefficient
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
FSM Example Model FSM Example Model Informal specification if driver turns on the key and does not fasten seat belt within 5 seconds then sound the alarm for 5 seconds or until driver fastens the seat belt or turns off the key Formal representation Inputs = {KEY_ON, KEY_OFF, BELT_ON, BELT_OFF, 5_SECONDS_UP, 10_SECONDS_UP} Outputs = {START_TIMER, ALARM_ON, ALARM_OFF} States = {Off, Wait, Alarm} Initial State = off NextState: CurrentState, Inputs -> NextState e.g. NextState(WAIT, {KEY_OFF}) = OFF Outs: CurrentState, Inputs -> Outputs e.g. Outs(OFF, {KEY_ON}) = START_TIMER
Background image of page 4
Standard FSM Nomenclature Standard FSM Nomenclature Finite automata behavior classified by properties of the set of states, and the transition relation (next_states, output) = Φ( state , event 29 which describes possible next states and outputs after an event Finite Automata Classifications Deterministic ” means that Φ (S,E) is single valued Completely Specified ” means that Φ (S,E) has a value for every possible input Sound ” means that outputs for a given (state, event) don’t conflict – I.e. no state says to turn the light on and off at the same time Moore ” means that outputs are fully determined by the current state – thus independent of the current event Mealy ” means that outputs depend on both the current state and on the current event Synchronous ” means that states change only on clocked intervals (events are polled) Asynchronous ” means that events can happen at any time and the FSM updates on event
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Sampling (clocked) FSM Sampling (clocked) FSM sampled and event automata model most embedded system FSM components
Background image of page 6
Image of page 7
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

Page1 / 99

lect3 - Lecture 3 Lecture Finite State Automata Models...

This preview shows document pages 1 - 7. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online