2011_HW2_Solution

2011_HW2_Solution - 3.7 (Parallel-Pattern Single-Fault...

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p-1 ECE255A HW2 Solution Solutions to ECE255A HW2 1. Any s-a-0 on a NAND input is equivalent to the output s-a-1 . The output s-a-0 dominates any input s-a-1 . Then a test set that detects all s-a-1 faults also defects all the s-a-0 faults on NAND inputs and outputs. (Note that a PI with fanout would be neither an input nor an output of a NAND, so we could not have claimed anything about the detection of its s- a-0 faults.) 2. Assume, by contradiction, that there exists a SSF f for which ) ( ) ( x Z x Z f = . Then every vector t detects f , because ) ( ) ( x Z t Z f . Let f be the s-a-v fault at line l . Since every vector t activates f , it must set line l to value v . But this shows that for every vector, the value of line l is v . Hence the v a s fault at line l can never be activated, and therefore is undetectable. But this contradicts the assumption that the circuit is irredundant.
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p-2 ECE255A HW2 Solution
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Unformatted text preview: 3.7 (Parallel-Pattern Single-Fault Propagation) PPSFP input internal output fault P a b D E F c fault-free P1 1 1 1 P2 1 1 P3 1 1 1 1 1 P1 1 1 1 P2 1 P3 1 1 P1 1 1 1 P2 1 1 1 1 P3 1 1 1 1 1 1 p-3 ECE255A HW2 Solution 3.8 (Parallel Fault Simulation) PFS input internal output Pattern fault a b D E F c P1 fault-free 1 1 1 1 1 1 1 1 1 P2 fault-free 1 1 1 1 1 1 1 P3 fault-free 1 1 1 1 1 1 1 1 1 1 1 1 1 p-4 ECE255A HW2 Solution 3.10 (Deductive Fault Simulation) For the purpose of demonstration, we do not perform fault collapsing here. The non-collapsed fault list is { a /0, a /1, b /0, b /1, D /0, D /1, H /0, H /1, E /0, E /1, F /0, F /1, c /0, c /1}. {a/0, D/0, E/0} {a/0, D/0, E/0}...
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This note was uploaded on 12/29/2011 for the course ECE 254b taught by Professor Parhami,b during the Fall '08 term at UCSB.

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2011_HW2_Solution - 3.7 (Parallel-Pattern Single-Fault...

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