p-1
ECE255A HW2 Solution
Solutions to ECE255A HW2
1.
Any
s-a-0
on a NAND input is equivalent to the output
s-a-1
. The output
s-a-0
dominates
any input
s-a-1
. Then a test set that detects all
s-a-1
faults also defects all the
s-a-0
faults
on NAND inputs and outputs. (Note that a PI with fanout would be neither an input nor
an output of a NAND, so we could not have claimed anything about the detection of its
s-
a-0
faults.)
2.
Assume, by contradiction, that there exists a SSF
f
for which
)
(
)
(
x
Z
x
Z
f
=
. Then every
vector
t
detects
f
,
because
)
(
)
(
x
Z
t
Z
f
≠
. Let
f
be the
s-a-v
fault at line
l
. Since every
vector
t
activates
f
, it must set line
l
to value
v
. But this shows that for every vector, the
value of line
l
is
v
. Hence the
v
a
s
−
−
fault at line
l
can never be activated, and therefore
is undetectable. But this contradicts the assumption that the circuit is irredundant.

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