p-1 ECE255A HW2 Solution Solutions to ECE255A HW2 1. Any s-a-0on a NAND input is equivalent to the output s-a-1. The output s-a-0dominates any input s-a-1. Then a test set that detects all s-a-1faults also defects all the s-a-0faults on NAND inputs and outputs. (Note that a PI with fanout would be neither an input nor an output of a NAND, so we could not have claimed anything about the detection of its s-a-0faults.) 2. Assume, by contradiction, that there exists a SSF ffor which )()(xZxZf=. Then every vector t detects f,because)()(xZtZf≠. Let f be the s-a-vfault at line l. Since every vector t activates f, it must set line l to valuev. But this shows that for every vector, the value of line l isv. Hence thevas−−fault at line lcan never be activated, and therefore is undetectable. But this contradicts the assumption that the circuit is irredundant.
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