This preview has intentionally blurred sections. Sign up to view the full version.
View Full DocumentThis preview has intentionally blurred sections. Sign up to view the full version.
View Full DocumentThis preview has intentionally blurred sections. Sign up to view the full version.
View Full DocumentThis preview has intentionally blurred sections. Sign up to view the full version.
View Full DocumentThis preview has intentionally blurred sections. Sign up to view the full version.
View Full DocumentThis preview has intentionally blurred sections. Sign up to view the full version.
View Full DocumentThis preview has intentionally blurred sections. Sign up to view the full version.
View Full DocumentThis preview has intentionally blurred sections. Sign up to view the full version.
View Full Document
Unformatted text preview: w
ECE23IS — Introductory Electronics Final Examination Lecturers — R. Genov, O. Trescases, T. Kosteski
Date — Thursday, April 30, 2009 Duration: 2 hours 30 minutes 1. You may write in pencil or pen. 2. The marks for each question are indicated within brackets [ ]. Place your ﬁnal answers in
the bOXes where given. 3. Show your work: answers without justiﬁcation will not receive ﬁlll marks! 4. Use back side of sheets if necessary. Extra sheets are also provided at the end. 5. Aids: One doubleside handwritten, lettersized aid sheet, and any type calculator. Last Name: First Name: Student #: Page 1 of 17 Last Name: Question 1: [10 marks] Consider the ampliﬁer shown below. You may ignore r0 for Q. a) [6 marks] Find an expression for the smallsignal gain, Gv = vo/ vsig . Using this expression, calculate the bias current I required to achieve a gain of G, =75 V/V, given RL = 10 k9, R3 = 25 k9, Rsig = 50 S2,
[3 = 20 and VT= 25 mV for Q1. V _ I = CC Page 2 of 17 Last Name: b) [4 marks] Using the axis provided below, draw the total signal (ac + dc component) for 1'30). Mark all relevant points and values. Page 3 of 17 Last Name: Question 2: [10 marks] The circuit shown below is used to amplify the differential output signal of a sensor. The sensor produces two voltage signals v11(t) and v12(t). R1 = 100 k9, R 2 = 1 M9. a) [3 marks] What is the differential gain of the'ampliﬁer A, = v” v—" ? You may assume that
Vi V12 — V11 the op amp is ideal (hint: use superposition). Ad= Page 4 of 17 Last Name: b) [3 marks] Assume that the op amp is ideal except for the fact that the input terminals have a non
zero bias current 13 and non—zero input offset current of 105. An output voltage of v0 = 2.5 V was obtained when v11 = 2 V and VI; = 2.1 V. Find the offset current 105. Page 5 of 17 Last Name: c) [4 marks] Now assume that the op amp is ideal, except for the fact that it has a ﬁnite DC gain A0 40 dB and a ﬁnite bandwidth (3dB frequency) of f1, = 50 kHz. Find the closedloop transfer function S
Ak
+
1
=
) S \W
/I\ /l\
0 .l
v v
__
\./
S
(
*d of the ampliﬁer. Your answer should be in the form: A w3dB * Find Adc and 1343, where f3d3 = w3d3/ 27c. Plot the magnitude response of both A d (s), as well as the Ad that you obtained from part a) on the axis provided below. Mark all relevant points and values. Page 6 of 17 Last Name: Question 2 (extra sheet): Page 7 of 17 Last Name: QuestiOn 3: [10 marks] In the circuit shown below the transistor Q1 is operating in the saturation region. Given RD = 4 k9, RL =
10 k9, Rsig = 1kg, V, = 1 V, MnCox (W/L) = 2 mA/Vz, A = 0, I = 1 mA. Draw the smallsignal equivalent circuit using the Tmodel for Q1 and determine the following: .3) VGS
b) gm
0) re
d) Rm
6) vo/vsig 5V Page 8 of .17 Last Name: Question 3 (extra sheet): Page 9 of 17 Last Name: Question 4: [10 marks] For the circuit shown below, the voltages vA and vB vary as shown below. For eachtime period, ﬁll in the
table indicating whether diode D1 and diode D2 are ON or OFF. In, addition, sketch the resulting
waveform vc on the graph below and label important voltages and time constants. Use the constant voltage drop model for the diodes (VD = 0.7 V) and assume vc (t = 0) = O V. Period: 1 II III 2 Page 10 of 17 Last Name: Question 4 (extra sheet): Page 11 of 17 Last Name: Question 5: [10 marks] A twostage ampliﬁer is shown below. The bias voltage at each node is given. Assume ‘uCox (W/L) =
V 2mA/V2, V, = 2 V and A = o for both MOSFETs. a) [2 marks]\Circle which type of singlestage ampliﬁer is represented by Q1 and Q2:
Q1: CommonSource CommonGate CommonDrain
Q2: CommonSource CommonGate CommonDrain b) [8 marks] Draw the smallsignal circuit and ﬁnd the smallsignal gain, 0 , input resistance, Rm and . output resistance, Rout. 15V 15V 15V
2kg
11.88V
6M9 6kg v0
9V Q2
1M9 00 6V Q
I
Rout
3V
vsig
4M9 3 kg
00 Page 12 of 17 Last Name: Question 5 (extra sheet): Page 13 of 17 Last Name: Question 6: [10 marks] The op amp has a unitygain bandwidth, f, = 0.5 MHz, and a slew rate of SR = 25V/usec but is otherwise ideal. Page 14 of 17 Last Name: b) [2 marks] Is the output distorted due to the ﬁnite slew rate? Page 15 of 17 Last Name: Extra Sheet: Page 16 of 17 Last Name: Extra Sheet: Page 17 of 17 ...
View
Full Document
 Winter '08
 Phang

Click to edit the document details