lecture10_ee689_rx_circuits

lecture10_ee689_rx_circuits - ECEN689: Special Topics in...

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Sam Palermo Analog & Mixed-Signal Center Texas A&M University ECEN689: Special Topics in High-Speed Links Circuits and Systems Spring 2011 Lecture 10: RX Circuits
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Announcements Next Week Shan will give Monday lecture at normal time No class next Wednesday I’ll be back for Friday’s lecture Lab 4 posted on website Reading Paper posted on sampler analysis 2
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Agenda RX Circuits RX parameters RX static amplifiers Clocked comparators Circuits Characterization techniques Integrating receivers RX sensitivity Offset correction Demultiplexing receivers 3
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High-Speed Electrical Link System 4
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Receiver Parameters RX sensitivity, offsets in voltage and time domain, and aperture time are important parameters Minimum eye width is determined by aperture time plus peak-to-peak timing jitter Minimum eye height is determined by sensitivity plus peak-to-peak voltage offset 5 [ Dally ]
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RX Block Diagram RX must sample the signal with high timing precision and resolve input data to logic levels with high sensitivity Input pre-amp can improve signal gain and improve input referred noise Can also be used for equalization, offset correction, and fix sampler common-mode Must provide gain at high-bandwidth corresponding to full data rate Comparator can be implemented with static amplifiers or clocked regenerative amplifiers Clocked regenerative amplifiers are more power efficient for high gain Decoder used for advanced modulation (PAM4, Duo-binary) 6
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RX Static Amplifiers – Single-Ended Inverter CMOS inverter is one of the simplest RX pre-amplifier structures Termination voltage, V TT , should be placed near inverter trip-point Issues: Limited gain (<20) High PVT variation results in large input referred offset Single-ended operation makes it both sensitive to and generate supply noise 7
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RX Static Differential Amplifiers Differential input amplifiers often used as input stage in high performance serial links Rejects common-mode noise Sets input common-mode for preceding comparator Input stage type (n or p) often set by termination scheme High gain-bandwidth product necessary to amplify full data rate signal Offset correction and equalization can be merged into the input amplifier 8 ( ) L m o L m v R g r R g A 1 1 1 = 3 1 1 4 3 3 1 m m o o o m m v g g g g g g g A + + + =
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RX Clocked Comparators 9 Also called regenerative amplifier, sense-amplifier, flip-flop, latch Samples the continuous input at clock edges and resolves the differential to a binary 0 or 1 [ J. Kim ]
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Important Comparator Characteristics Offset and hysteresis Sampling aperture, timing resolution, uncertainty window Regeneration gain, voltage sensitivity, metastability Random decision errors, input-referred noise 10
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Dynamic Comparator Circuits To form a flip-flop After strong-arm latch, cascade an R-S latch After CML latch, cascade another CML latch Strong-Arm flip-flop has the advantage of no static power dissipation and full CMOS output levels 11 Strong-Arm Latch CML Latch [ Toifl ] [ J. Kim ]
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This note was uploaded on 01/01/2012 for the course ECEN 689 taught by Professor Enjeti during the Spring '07 term at Texas A&M.

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lecture10_ee689_rx_circuits - ECEN689: Special Topics in...

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