Instruction Cycle STR

Instruction Cycle STR - IR[8:6] + sext16(IR[5:0]) Operand...

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STR Instruction Cycle Instruction Fetch MAR PC PC PC + 1 MDR memory[MAR] IR MDR Decode IR[15:12] decoded Evaluate Address MAR R
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Unformatted text preview: IR[8:6] + sext16(IR[5:0]) Operand Fetch n/a Execute n/a Store Result MDR R IR[11:9] memory[MAR] MDR...
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This note was uploaded on 01/04/2012 for the course CDA 3103 taught by Professor Normanpestaina during the Fall '11 term at FIU.

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