Interrupt

Interrupt - } push( PC ) push( PSR ) b) Load the state of...

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Interrupt-Driven I/O 1) The enabling mechanism that allows the device to interrupt the processor (Ch. 8) 2) The process that manages the transfer of the I/O data (Ch. 10.2) I/O Data Transfer 1) Initiate the interrupt a) Save the state of the interrupted program b) Load the state of the service routine 2) Service the interrupt 3) Return from the interrupt Program State 1) PSR Processor Status Register a) Pr Privilege: 0 = supervisor mode, or 1 = user mode b) PL Priority Level: 0 . . 7 c) Flags / Condition Codes N , Z , P Pr PL PL PL N Z P 2) PC – Program Counter 3) General Purpose Registers – R0, R1, . . R7 4) Memory allocated to the program I/O Data Transfer 4) Initiate the interrupt a) Save the state of the interrupted program //Registers: Saved.SSP , Saved.USP , Stack Pointer( R6 ) If ( PSR [15] ) //user mode { Saved.USP R6 R6 Saved.SSP
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Unformatted text preview: } push( PC ) push( PSR ) b) Load the state of the service routine Interrupt Vector Table x0100 x01FF I/O Process supplies 8-bit INTV MAR x01_ext 16 (INTV) rd; MDR memory[ MAR ] PC MDR PSR x 0000 ppp 00000 000 5) Service the interrupt Interrupt Handler Executes 6) Return from the interrupt RTI instruction RTI Execute Phase if (! PSR[15] ) { /* pop the (supervisor) stack into PSR */ MAR R6 MDR memory[MAR] PSR MDR R6 R6 + 1 /* pop the (supervisor) stack into PC */ MAR R6 MDR memory[MAR] PC MDR R6 R6 + 1 /* reset stack pointer if switching back to user mode*/ if ( PSR[15] ) { Saved.SSP R6 R6 Saved.USP } } else Raise a privilege mode exception...
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This note was uploaded on 01/04/2012 for the course CDA 3103 taught by Professor Normanpestaina during the Fall '11 term at FIU.

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Interrupt - } push( PC ) push( PSR ) b) Load the state of...

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