week7 - Week 7 8051 Timers 1 Inside Architecture of 8051...

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1 Week 7 8051 Timers
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2 Inside Architecture of 8051 CPU On-chip RAM On-chip ROM for program code 4 I/O Ports Timer 0 Serial Port Figure 1-2. Inside the 8051 Microcontroller Block Diagram OSC Interrupt Control External interrupts Timer 1 Timer/Counter Bus Control TxD RxD P0 P1 P2 P3 Address/Data Counter Inputs
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3 Timers /Counters ± The 8051 has 2 timers/counters: timer/counter 0 and timer/counter 1. They can be used as 1. The timer is used as a time delay generator. ² The clock source is the internal crystal frequency of the 8051. 2. An event counter . ² External input from input pin to count the number of events on registers. ² These clock pulses could represent the number of people passing through an entrance, or the number of wheel rotations, or any other event that can be converted to pulses.
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4 Timer ± Set the initial value of registers ± Start the timer and then the 8051 counts up . ± When the registers equal to 0, the 8051 sets a bit to denote time out ± 8051 timers use 1/12 of XTAL frequency, regardless of machine cycle . XTAL oscillator ÷ 12 Timer
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5 Counter ± Count the number of events ² Show the number of events (1 to 0 transition) on registers ² External input from T0 input pin (P3.4) for Counter 0 ² External input from T1 input pin (P3.5) for Counter 1 ² The external input is sampled at each machine cycle (S5P2) ² The new value appears in timer registers during S3P1 of the cycle following the one in which the transition is detected ² We use Tx to denote T0 or T1. T0 P3.4 8051 a switch TL0 TH0 Vcc
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6 Registers Used in Timer/Counter ± TH0, TL0, TH1, TL1 (Timer 0 and Timer 1 registers) ± TMOD (Timer mode register) ± TCON (Timer control register) ± You can see Appendix H (pages 607-611) for details. ± Since 8052 has 3 timers/counters, the formats of these control registers are different. ² T2CON (Timer 2 control register), TH2 and TL2 used for 8052 only.
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7 Basic Registers of the Timer ± Both Timer 0 and Timer 1 are 16 bits wide. ² These registers stores • the time delay as a timer • the number of events as a counter ² Timer 0: TH0 & TL0 • Timer 0 high byte, timer 0 low byte ² Timer 1: TH1 & TL1 • Timer 1 high byte, timer 1 low byte ² Each 16-bit timer can be accessed as two separate registers of low byte and high byte.
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8 Timer Registers D15 D8 D9 D10 D11 D12 D13 D14 D7 D0 D1 D2 D3 D4 D5 D6 TH0 TL0 D15 D8 D9 D10 D11 D12 D13 D14 D7 D0 D1 D2 D3 D4 D5 D6 TH1 TL1 Timer 0 Timer 1
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9 TCON Register (1/2) ± Timer control register: TCON ² Upper nibble for timer/counter, lower nibble for interrupts ± TR (run control bit) ² TR0 for Timer/counter 0; TR1 for Timer/counter 1. ² TR is set by programmer to turn timer/counter on/off. • TR=0: off (stop) •TR = 1 : o n ( s t a r t ) TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 Timer 1 Timer0 for Interrupt (MSB) (LSB)
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10 TCON Register (2/2) ± TF (timer flag, control flag) ² TF0 for timer/counter 0; TF1 for timer/counter 1.
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This note was uploaded on 01/09/2012 for the course CS cs464 at Bilkent University.

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week7 - Week 7 8051 Timers 1 Inside Architecture of 8051...

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