Lec8-division - Divide Paper Pencil 1001 Quotient Dividend...

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EEL-4713 Ann Gordon-Ross.1 Computer Architecture ALU Design : Division and Floating Point EEL-4713 Ann Gordon-Ross.2 Divide: Paper & Pencil 1001 Quotient Divisor 1000 1001010 Dividend –1000 10 101 1010 –1000 10 Remainder (or Modulo result) See how big a number can be subtracted, creating quotient bit on each step Quotient bit = 1 if can be subtracted, 0 otherwise Dividend = Quotient x Divisor + Remainder 3 versions of divide, successive refinement EEL-4713 Ann Gordon-Ross.3 Divide algorithm ° Main ideas: Expand both divisor and dividend to twice their size - Expanded divisor = divisor (half bits, MSB) zeroes (half bits, LSB) - Expanded dividend = zeroes (half bits, MSB) dividend (half bits, LSB) At each step, determine if divisor is smaller than dividend - Subtract the two, look at sign - If >=0: dividend/divisor>=1, mark this in quotient as 1 - If negative: divisor larger than dividend; mark this in quotient as 0 Shift divisor right and quotient left to cover next power of two Example: 7/2 EEL-4713 Ann Gordon-Ross.4 DIVIDE HARDWARE Version 1 ° 64-bit Divisor reg, 64-bit ALU, 64-bit Remainder reg, 32-bit Quotient reg 0s Remainder Divid . Quotient Divisor 0s 64-bit ALU Shift Right Shift Left Write Control 32 bits 64 bits 64 bits
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EEL-4713 Ann Gordon-Ross.5 2b. Restore the original value by adding the Divisor register to the Remainder register, & place the sum in the Remainder register. Also shift the Quotient register to the left, setting the new rightmost bit to 0. Divide Algorithm Version 1: 7/2 ° Takes n+1 steps for n-bit Quotient & Rem. Remainder Quotient Divisor 0000 0111 0000 0010 0000 Test Remainder Remainder < 0 Remainder >= 0 1. Subtract the Divisor register from the Remainder register, and place the result in the Remainder register. 2a. Shift the Quotient register to the left setting the new rightmost bit to 1. 3. Shift the Divisor register right1 bit. Done Yes: n+1 repetitions (n = 4 here) Start: Place Dividend in Remainder n+1 repetition? No: < n+1 repetitions EEL-4713 Ann Gordon-Ross.6 Divide Algorithm Version 1: 7 (0111) / 2 (0010) = 3 (0011) R 1 (0001) Step Remainder Quotient Divisor Rem-Div Initial 0000 0111 0000 0010 0000 < 0 1 0000 0111 0000 0001 0000 < 0 2 0000 0111 0000 0000 1000 < 0 3 0000 0111 0000 0000 0100 0000 0011 > 0 4 0000 0011 0001 0000 0010 0000 0001 > 0 5 0000 0001 0011 0000 0001 Final 1 3 EEL-4713 Ann Gordon-Ross.7 Observations on Divide Version 1 ° 1/2 bits in divisor always 0 => 1/2 of 64-bit adder is wasted => 1/2 of divisor is wasted ° Instead of shifting divisor to right, shift remainder to left? ° 1st step will never produce a 1 in quotient bit (otherwise too big) => switch order to shift first and then subtract, can save 1 iteration EEL-4713 Ann Gordon-Ross.8 Divide Algorithm Version 1: 7 (0111) / 2 (0010) = 3 (0011) R 1 (0001) Step Remainder Quotient Divisor Rem-Div Initial 0000 0111 0000 0010 0000 < 0 1 0000 0111 0000 0001 0000 < 0 2 0000 0111 0000 0000 1000 < 0 3 0000 0111 0000 0000 0100 0000 0011 > 0 4 0000 0011 0001 0000 0010 0000 0001 > 0 5 0000 0001 0011 0000 0001 Final 1 3 First Rem-Dev always < 0 Always 0
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EEL-4713 Ann Gordon-Ross.9 DIVIDE HARDWARE Version 2 ° 32 -bit Divisor reg, 32 -bit ALU, 64-bit Remainder reg, 32-bit Quotient reg Remainder Quotient Divisor 32-bit ALU Shift Left Write Control 32 bits 32 bits 64 bits Shift Left EEL-4713 Ann Gordon-Ross.10 Divide Algorithm Version 2 Remainder Quotient Divisor 0000 0111 0000 0010 3b.
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