Lec14-VM - Outline Recap of Memory Hierarchy Virtual Memory...

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vm.1 EEL-4713 Computer Architecture Virtual Memory vm.2 Outline ° Recap of Memory Hierarchy ° Virtual Memory ° Page Tables and TLB ° Protection vm.3 Memory addressing - physical ° So far we considered addresses of loads/stores go directly to caches/memory • As in your project ° This makes life complicated if a computer is multi-processed/multi-user • How do you assign addresses within a program so that you know other users/programs will not conflict with them? Program A: Program B: store 0x100,1 store 0x100,5 load R1,0x100 vm.4 Virtual Memory? Provides illusion of very large memory – sum of the memory of many jobs greater than physical memory – address space of each job larger than physical memory Allows available (fast and expensive) physical memory to be efficiently utilized Simplifies memory management and programming Exploits memory hierarchy to keep average access time low. Involves at least two storage levels: main and secondary Main (DRAM): nanoseconds, M/GBytes Secondary (HD): miliseconds, G/TBytes Virtual Address -- address used by the programmer Virtual Address Space -- collection of such addresses Memory Address -- address of word in physical memory also known as l physical address z or l real address z
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Memory addressing - virtual Program A: Program B: store 0x100 ,1 store 0x100 ,5 load R1, 0x100 Translation A: Translation B: 0x100 -> 0x40000100 0x100 -> 0x50000100 Use software and hardware to guarantee no conflicts Operating system: keep software translation tables Hardware: cache recent translations vm.6 Basic Issues in VM System Design size of information blocks (pages) that are transferred from secondary (disk) to main storage (Mem) Page brought into Mem, if Mem is full some page of Mem must be released to make room for the new page --> replacement policy missing page fetched from secondary memory only on the occurrence of a page fault --> fetch/load policy Paging Organization virtual and physical address space partitioned into blocks of equal size page frames pages pages reg cache mem disk frame vm.7 Address Map V = {0, 1, . . . , n - 1} virtual address space M = {0, 1, . . . , m - 1} physical address space MAP: V --> M U {0} address mapping function n can be > m MAP(a) = a' if data at virtual address a is present in physical address a' in M = 0 if data at virtual address a is not present in M need to allocate address in M Processor Name Space V Addr Trans Mechanism fault handler Main Memory Secondary Memory a a a' 0 missing item fault physical address OS performs this transfer vm.8 Paging Organization frame 0 1 7 0 1024 7168 Phys Addr (PA) Physical Memory 1K 1K 1K Addr Trans MAP page 0 1 31 1K 1K 1K 0 1024 31744 Page size: unit of mapping also unit of transfer from virtual to physical memory Virtual Memory Address Mapping VA page no. Page offset 10 Page Table index into page table Page Table Base Reg V Access Rights PA + table located in physical memory physical memory address (concatenation) Virt. Addr (VA) Page table stored in memory
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This note was uploaded on 01/09/2012 for the course EEL 4713 taught by Professor Staff during the Spring '11 term at University of Florida.

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Lec14-VM - Outline Recap of Memory Hierarchy Virtual Memory...

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