This preview shows page 1. Sign up to view the full content.
Unformatted text preview: both negative and the sign bit of the result is 0. Design an overflow detection circuit for an adder that adds two n-bit numbers, A and B, to produce an n-bit sum S. A n-1 , B n-1 and S n-1 are the sign bits of A, B and Sum. Use a truth table to get started and remember that overflow cannot occur if the signs of A and B are different. 4. Read Chapter 7 sections 3-6 5. Problem 7.1 6. Apply the waveforms of problem 7.1 to the T flip-flop of figure 7.16(a). Use the D signal from the waveform for the T input to the flip flop. 7. Apply the waveform below to a. A positive-edge triggered J-K flip flop b. A negative-edge triggered J-K flip flop HW #6...
View Full Document
This note was uploaded on 01/10/2012 for the course ENG 0618-301 taught by Professor Christman during the Spring '07 term at RIT.
- Spring '07