# 2009MT2 - EECS 413 Final 2009 Exam duration 1.5 hour 4...

This preview shows pages 1–15. Sign up to view the full content.

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: EECS 413 Final 2009 Exam duration: 1.5 hour 4 questions Name: SOLvTQN5 Do not discuss this exam with other students until after the Monday exam sitting. Honor Pledge I have not given or received aid on this exam Signed: Question 1 (a) What are the values of B and A0? 3 s o « l Ab 3 [00 Id (b) Assume k=0 and ignore the body effect. Write an expression for the small-signal low-frequency gain for each ampliﬁer. Assume transistors are in saturation. (i) VBia 3M ' l (11) (iii) M2 M2 (c) The loop gain of a single—pole ampliﬁer in feedback with [3:05 falls to l at 100MHz. The ampliﬁer has a single pole at lMHz. What is the low frequency gain of the ampliﬁer? (d) VDD Here M3 and M5 double cascode the current source M2. Transistors Ml-MS are identical having width W and length L. Both M6 and M7 also have width W. This problem concerns the lengths of M6 and M7. Assume M4 is in saturation. Ignore the body effect. What are the minimum lengths for transistors M6 and M7 so that the cascode transistors have the appropriate bias voltages. L7 : lSL. \$31. [\. 0“ ll Question 2 M1=M2, M3=M4, M5=M6 All MOSFETs are the same length. All transistors are in saturation. The widths of M3, M4 are half those of M1, M2. Assume i=0 and ignore body effect. (a) Write an expression for the small-signal low-frequency gain. (46°C; 5 __L— SML ‘3’“; :3 (2)"! 2 13M} 2 gm :3 A, 5/CAM (b) Ignoring all capacitances except C05 write and expression for the frequency dependent small signal gain. Aug) : Zia—:5 3M! 1+ 353353 QW‘J Le W :3, (est-('CQSB : 3 C65) O O (0) Write an expression for the low-frequency small-signal common-mode gain? (i.e. input common mode to output common mode gain) [Hintz symmetry] : * (AM: J (d) Write an expression for the frequency-dependent small-signal common-mode gain? O (Ignore all capacitances except Cos) «L’ 2 Z n + C6: ) chxj SIRS v.32.— : .‘r s 5 \I .‘L. ygéx + Z<%‘M5+CCJ'5> - a :t 7. Y2 ( C 35* 55 3 r"5 7” (ass) Ngmdgnjv :L + 5 CCSi-l .2653 SM. + 31,-, arms 3 z — , ,L . ._J___ 1 1L4 2 msg égms H A _\— _ 8. “*5 D 1 WSS IT 5 Cali-CG; I+Z<5MSQKSS Identify any poles and zeros in the common mode gain. 1 Pale; I'x.._/ (6) Write an expression for the frequency—dependent Common Mode Rejection Ratio (CMRR) (Mata ~ “0(5) A’CM (3) Z \ : 93m- gm ) + 5 3C“: 9’“: M CAMS l o ‘ H 225) «2w 6mm l + SZQAJCw Question 3 An ampliﬁer is in unity gain feedback. It has two poles, one at lOOkHz and the second at 100MHz. (a) If the unity loop—gain frequency is SOMHz, then what is the phase margin? [Hintz simplify by making the usual assumption about the phase contribution of the low-frequency pole] w 53> H ,A n 0\ U 65 0 10 O (b) What is the low frequency (Le. open loop) gain of the ampliﬁer? 1.25.: ocngQ-ke maﬁﬁﬂ‘ _ SOP-m (Golda? “(0‘ acuch Q“ WW WV 11 (c) Sketch the Bode and Phase plots of (i) closed loop gain, (ii) loop gain, (iii) ampliﬁer gain Indicate the phase margin. Question 4 M5 Vb J— Assume gm >> 1/ro and simplify appropriately. Assume all transistors are in saturation. Also M1=M2, M3=M4 To simplify your analysis, assume the tail node (i.e. node P) is a small-signal ground. Ignore the body effect. Ignore all capacitors except CL and Cos (a) Write expressions for the poles and zeros. 599.. Ckova‘kf‘ 6 ,1,— — (5"; tap : - mg, 1 _,__,, at, J \l \$02M“, CL C C 6:34—(65‘! (b) Write an expression for the frequency-dependent small-signal gain. R/Q) w, ﬁnn‘qbﬂlfo‘f) €>N\3"f SCG‘D o . i 3.3% 'SZCQSJ 5 Yo Q *t i 1‘ ralurm1 l3 O (c) Sketch the Bode and Phase plots. ((1) Assuming only a single pole to simplify, estimate the unity-gain frequency. 6m. /c L, 14 O (e) Write an expression for the low-frequency small-signal gain from the supply (i.e. VDD) to Vom, [Hint: For this the differential inputs will both be shorted to a DC bias voltage] A W M3 \mlp) Ha. vaii? dwidox V0 Ag 26> CQSKQAO. \Ja g“) 7‘ 1 H5 P‘SA' SAD + intro: 15 ...
View Full Document

{[ snackBarMessage ]}

### Page1 / 15

2009MT2 - EECS 413 Final 2009 Exam duration 1.5 hour 4...

This preview shows document pages 1 - 15. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online