lecture 42

lecture 42 - Summary of Lecture #42 Final, Fall 2010 Dec....

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1 1 Final, Fall 2010 Dec. 17, 2010, Friday 1:00 PM - 3:00 PM SMTH 108 A seating chart will be posted by 12/17/2010, Friday. Sit in assigned seat only. Comprehensive, Chapters 12 thru 19, inclusive, and a set of handouts No crib sheet, no calculator or laptop is allowed. Tables 12.1, 12.2, 16.2 and 18.1 will be handed out with test questions. DO NOT bring them to the final. 20 to 30 MC questions. No WO question. Roughly, approximately, about, around 25 MC questions No WO question 4 Summary of Lecture #42 12/06/2010 Short-circuited admittance para. [Y] and y ij (s) [Y] by matrix partitioning Two-dependent source equivalent circuit Terminated two port circuits Y in , Y out , voltage gain and current gain Examples Hybrid parameters, [H] and h ij (s) [H] by matrix partitioning Two-dependent source equivalent circuit Terminated two port circuits, Z in , Y out , voltage gain and current gain Examples Transmission parameters, [T] and t ij (s) Two-dependent source equivalent circuit Terminated two port circuits, Z in , Z out , voltage gain and current gain Examples 7 Input and output impedance in terms of [Z] Input and output admittance in terms of [Y] Input Z and output Y in terms of [H] Input and output Z in terms of [T] L 22 21 12 11 1 1 in Y y y y y V I Y + - = = s 11 21 12 22 2 2 out Y y y y y V I Y + - = = L 22 21 12 11 in Z z z z z Z + - = s 11 21 12 22 out Z z z z z Z + - = L 22 21 12 11 in Y h h h h Z + - = s 11 21 12 22 out Z h h h h Y + - = 22 L 21 12 L 11 in t Z t t Z t Z + + = 11 s 21 12 s 22 out t Z t t Z t Z + + = 8 Terminated two-port circuits where immi ttance stands for im pedance or ad mi ttance, and γ ij stands for z ij , y ij or h ij . . immit source . immit Output . immit load . immit Input 11 21 12 22 22 21 12 11 + γ γ γ - γ = + γ γ γ - γ = ] H [ or ] Z [ ], Y [ [Z], [Y] and [H] only, not [T] . 9 Meaning of short-circuited admittance parameters y 11 : input admittance at port 1 with port 2 shorted y 21 : transfer admittance with port 2 shorted y 22 : input admittance at port 2 with port 1 shorted y 12 : transfer admittance with port 1 shorted = 2 1 22 21 12 11 2 1 V V y y y y I I [y] I 1 I 2 V 1 + - + - V 2 [y] I 1 I 2 V 1 + - y 11 [y] I 1 I 2 + - V 2 y 22 0 V 1 2 21 0 V 1 1 11 2 2 V I y , V I y = = = = 0 V 2 1 12 0 V 2 2 22 1 1 V I y , V I y = = = = 10 Short -circuited admittance parameters y ij are in unit of S (or mhos). Methods to determine
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lecture 42 - Summary of Lecture #42 Final, Fall 2010 Dec....

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