CPLD_Prog_Issues_V1

CPLD_Prog_Issues_V1 - CPLD Programming Issues Common...

Info iconThis preview shows pages 1–6. Sign up to view the full content.

View Full Document Right Arrow Icon
CPLD Programming Issues Common problems and solutions M. H. Alsafrjalani
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
The programmer returns errors Check the error code you are getting. Different codes hint to different solutions Also, know what JTAG stands for. Very briefly, as defined in the IEEE standard, it is a method to test the interconnections on a given PCB JTAG related errors usually are due failure to communicate with the chip M. H. Alsafrjalani ECE Dept. UF
Background image of page 2
First steps Make sure your driver is installed properly Make sure you see the USB hardware listed inside the programmer and is selected Before programming, recompile if you have done any changes to your design M. H. Alsafrjalani ECE Dept. UF
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Programming takes 1mSec!! Sometimes when you program your CPLD, it goes from 0% to 100% in less than 1 second! This happens if the USB hardware is not selected, wrong file (.sof), etc M. H. Alsafrjalani ECE Dept. UF
Background image of page 4
“Can’t access JTAG” error Make sure your CPLD board is connected to power, and power ONLY!
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 6
This is the end of the preview. Sign up to access the rest of the document.

Page1 / 9

CPLD_Prog_Issues_V1 - CPLD Programming Issues Common...

This preview shows document pages 1 - 6. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online